ST9291 ST Microelectronics, ST9291 Datasheet
ST9291
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ST9291 Summary of contents
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... FUNCTIONAL DESCRIPTION PSDIP42 PSDIP56 (Ordering Information at the end of the Datasheet) DEVICE SUMMARY Device ROM RAM ST9291J2/N2 16K 384 ST9291J3/N3 16K 640 ST9291J4/N4 24K 384 ST9291J5/N5 24K 640 ST9291J6/N6 32K 640 ST9291J7/N7 48K 640 ST9291 PACKAGE PSDIP42/56 PSDIP42/56 PSDIP42/56 PSDIP42/56 PSDIP42/56 PSDIP42/56 1/20 ...
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... PLLR 20 P5.0/SCK/INT2 23 PLLF Notes (N Package only N.C. means “not connected” 2. Pins 14 and are internally connected 2/20 Figure 2. 56 Pin Shrink DIP Pinout ST9291N Pin Description Pin Pin Pin name name 1 P2.1/INT5/AIN1 2 P2.0/INT7 3 RESET 4 P0.7 5 P0.6 6 P0.5 .( ...
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... GENERAL DESCRIPTION The ST9291 is a ROM member of the ST9 family of microcontrollers, completely developed and pro- duced by SGS-THOMSON Microelectronics using a proprietary n-well HCMOS process. The ROM parts are fully compatible with their EPROM and OTP (One-Time Programmable) ver- sions, which may be used for the prototyping and pre-production phases of development ...
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... The voltage in open drain output mode for all other I/O bits must not exceed I/O Port Alternate Functions. Each pin of the I/O ports of the ST9291 may as- sume software programmable Alternative Func- tions as shown in the Pin Configuration Drawings. Table 1 shows the Functions allocated to each I/O Port pin. ...
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... PIN DESCRIPTION (Continued) Table 1.ST9291 I/O Port Alternative Function Summary I/O PORT Name Function Port.bit P0.0 I/O P0.1 I/O P0.2 I/O P0.3 I/O P0.4 I/O P0.5 I/O P0.6 I/O P0.7 I/O P1.0 I/O P1.1 I/O P1.2 I/O P1.3 I/O P1.4 I/O P1.5 I/O P1.6 I/O P1.7 I/O P2.0 INT7 I P2.1 INT5 I P2.1 AIN1 I P2.2 INT0 I P2.2 AIN2 I P2.3 INT6 I P2.3 VSO1 O P2.4 NMI I P2.5 AIN3 I P2.5 VSO2 Alternate Function External Interrupt 7 with Schmitt Trigger External Interrupt 5 with Schmitt Trigger A/D Analog Input 1 ...
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... ST9291 PIN DESCRIPTION (Continued) Table 1. ST9291 I/O Port Alternative Function Summary (Continued) I/O PORT Name Function Port.bit P3.4 I/O P3.5 I/O P3.6 I/O P3.7 I/O P4.0 PWM0 O P4.1 PWM1 O P4.2 PWM2 O P4.3 PWM3 O P4.4 PWM4 O P4.5 PWM5 O P4.6 PWM6 O P4.7 PWM7 O P4.7 EXTRG I P5.0 SCK O P5.0 INT2 I P5.1 SDIO I/O P5.2 I/O P5.3 I/O Notes. 1. The alternate functions of SCK/INT2 and SDIO may be swapped by using the SWAP Register Function. ...
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... The Register File consists of: - 224 general purpose registers R0 to R223 - 16 system registers in the System Group (R224 to R239). - I/O pages depending on the configuration of the ST9, each containing registers, with paging facilities based on the top group (R240 to R255). MEMORY REGISTER FILE ST9291 64K DATA VA00430 7/20 ...
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... ST9291 ADDRESS SPACES (Continued) Figure 1-5. Register Grouping 255 64 PAGES F PAGED REGISTERS 240 239 E SYSTEM REGISTERS 224 223 GENERAL PURPOSE 6 REGISTERS Figure 1-7. Addressing the Register File REGISTER FILE 255 F PAGE REGISTERS 240 239 E SYSTEM REGISTERS ...
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... Decimal Function Address Address Paged F0-FF 240-255 Registers System E0-EF 224-239 Registers D0-DF 208-223 C0-CF 192-207 B0-BF 176-191 A0-AF 160-175 90-9F 144-159 80-8F 128-143 General Purpose 70-7F 112-127 Registers 60-6F 96-111 50-5F 80-95 40-4F 64-79 30-3F 48-63 20-2F 32-47 10-1F 16-31 00-0F 00-15 ST9291 Register File Group Group F Group E Group D Group C Group B Group A Group 9 Group 8 Group 7 Group 6 Group 5 Group 4 Group 3 Group 2 Group 1 Group 0 9/20 ...
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... ST9291 ADDRESS SPACES (Continued) Table 1-3. Group F Peripheral Organization Applicable for ST9291 HEX 00 02 DEC 00 02 R255 RFF SWAP RESER R254 RFE SPI R253 RFD PORT 3 R252 RFC WCR R251 RFB RESER RESER R250 RFA T/WD R249 RF9 PORT 2 R248 RF8 R247 RF7 ...
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... The CPL bits can be set by hardware or software and give the reference by which following interrupts are either left pending or able to interrupt the current interrupt. When the present interrupt is replaced by one of a greater priority, the current priority value is automatically stored until required. ST9291 11/20 ...
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... ST9291 SYSTEM REGISTERS (Continued) 1.1.3.2 Flag Register The Flag Register contains 8 flags indicating the statusof the ST9. During an interrupt the flag register is automatically stored in the system stack area and recalled at the end of the interrupt service routine so that the ST9 is returned to the original status. This ...
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... Register Pointers. To address group D then necessary to set the Register Pointer to group D and then use the addressing procedure for working registers. The programmer is required to remember that the group D should be used as a stacking area. This point is also covered in the Stack Pointers paragraph. ST9291 13/20 ...
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... ST9291 SYSTEM REGISTERS (Continued) EXAMPLES Using the Single 16 Register Group When the system is operating in the single 16-reg- ister group mode, the registers are referred to as r0-r15. In this mode, the offset value (i.e. the num- ber of the working register referred to) is supplied in the address (preceded by a small r, e.g. r5) and is added to the Register Pointer 0 value to give the absolute address ...
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... The prescaling value selects the frequency of the ST9 clock, which can be di- vided See Clock chapter for more infor- mation BRQEN: Bus Request Enable . This bit must be held to “0” HIMP: High Impedance Enable . This bit must be held to “0”. ST9291 15/20 ...
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... ST9291 SYSTEM REGISTERS (Continued) 1.1.3.6 Stack Pointers There are two separate, double register stack pointers available (named System Stack Pointer and User Stack Pointer), both of which can ad- dress registers or memory. The stack pointers point to the bottom of the stacks which are filled using the push commands and emptied using the pop commands ...
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... Figure 1-12. System and/or User Stack in Memory Stack Mode DATA MEMORY SYSTEM REGISTERS STACK POINTER L STACK POINTER H STACK System Stack Pointer High Byte Reset value: undefined SSP R239 (EFh) System Read/Write System Stack Pointer Low Byte Reset value: undefined 1.2 MEMORY ST9291 VA00435 17/20 ...
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... This should point to the relevant Interrupt Service routine provided by the User for immedi- ate response to the interrupt. 1.2.1.2 Data Space The ST9291 addresses the 640 bytes of on-chip RAM memory from addresses FD80h to FFFFh in both Program and Data Space. On-chip general purpose Registers may be used as additional RAM memory for minimum chip count systems ...
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... J5/N5 24K 0000 - 5FFF 0 - 32767 J6/N6 32K 0000 - 7FFF 00000 - 49151 J7/N7 48K 0000 - BFFF Figure 1-13. ST9291 Memory Map 65535 64896 49151 32767 24575 16383 INTERNAL RAM MAPPED BOTH INTO PROGRAM AND DATA SPACE RAM Size (Bytes) dec 384 hex ...
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... ST9291 Notes: Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice ...