CY7C4211V-15AC Cypress Semiconductor Corp, CY7C4211V-15AC Datasheet - Page 9

IC SYNC FIFO MEM 512X9 32-TQFP

CY7C4211V-15AC

Manufacturer Part Number
CY7C4211V-15AC
Description
IC SYNC FIFO MEM 512X9 32-TQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C4211V-15AC

Function
Synchronous
Memory Size
4.6K (512 x 9)
Data Rate
100MHz
Access Time
10ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1212

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C4211V-15AC
Manufacturer:
NXP
Quantity:
199
Part Number:
CY7C4211V-15AC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Waveforms
Notes:
Document #: 38-06010 Rev. *A
11. t
12. t
Read Cycle Timing
REN1,REN2
Write Cycle Timing
(if applicable)
REN1,REN2
edge of RCLK and the rising edge of WCLK is less than t
edge of WCLK and the rising edge of RCLK is less than t
WEN2
SKEW1
SKEW1
Q
D
WEN1
WEN1
WEN2
WCLK
WCLK
RCLK
0
0
RCLK
–Q
–D
OE
FF
EF
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time between the rising
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that EF will go HIGH during the current clock cycle. It the time between the rising
8
8
t
ENS
t
OLZ
t
SKEW1
t
ENH
t
t
[11]
CLKH
CLKH
t
t
t
WFF
A
REF
t
OE
SKEW1
SKEW1
t
t
, then FF may not change state until the next WCLK rising edge.
, then EF may not change state until the next RCLK rising edge.
CLK
CKL
t
SKEW1
NO OPERATION
[12]
t
DS
t
t
CLKL
CLKL
t
ENS
CY7C4421V/4201V/4211V/4221V
t
VALID DATA
DH
t
ENH
t
REF
t
WFF
CY7C4231V/4241V/4251V
t
OHZ
NO OPERATION
NO OPERATION
Page 9 of 17

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