CY7C4285-10ASC Cypress Semiconductor Corp, CY7C4285-10ASC Datasheet - Page 5

• Manufacturer Part Number: CY7C4285-10ASC
• Description: IC DEEP SYN FIFO 64KX18 64LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4285-10ASC

• Function: Synchronous
• Memory Size: 1.1K (64 x 18)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Configuration: Dual
• Density: 1.125Mb
• Access Time (max): 8ns
• Word Size: 18b
• Organization: 64Kx18
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: TQFP
• Clock Freq (max): 100MHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 50mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1241

AC Test Loads and Waveforms
Switching Characteristics
Document #: 38-06008 Rev. *A
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
10. C
11. Pulse widths less than minimum values are not allowed.
12. Values guaranteed by design, not currently tested.
13. t
S
A
CLK
CLKH
CLKL
DS
DH
ENS
ENH
RS
RSR
RSF
PRT
RTR
OLZ
OE
OHZ
WFF
REF
PAFasynch
PAFsynch
PAEasynch
9.
Parameter
OUTPUT
C
PAFasynch
L
L
INCLUDING
5V
= 30 pF for all AC parameters except for t
= 5 pF for t
JIG AND
SCOPE
, t
PAEasynch
C
Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Data Set-Up Time
Data Hold Time
Enable Set-Up Time
Enable Hold Time
Reset Pulse Width
Reset Recovery Time
Reset to Flag and Output Time
Retransmit Pulse Width
Retransmit Recovery Time
Output Enable to Output in Low Z
Output Enable to Output Valid
Output Enable to Output in High Z
Write Clock to Full Flag
Read Clock to Empty Flag
Clock to Programmable Almost-Full Flag
Clock to Programmable Almost-Full Flag
Clock to Programmable Almost-Empty Flag
L
(Asynchronous mode, V
(Asynchronous mode, V
(Synchronous mode, V
OHZ
R1 1.1K
.
, after program register write will not be valid until 5 ns + t
R2
680
4275–4
Over the Operating Range
[11]
Description
CC
CC
[9, 10]
CC
/SMODE tied to V
Equivalent to:
OHZ
/SMODE tied to V
/SMODE tied to V
.
[12]
[12]
[13]
OUTPUT
CC
THÉ VENIN EQUIVALENT
[13]
PAF(E)
)
SS
CC
)
.
)
GND
3.0V
3 ns
Min.
7C42X5-10
4.5
4.5
0.5
0.5
10
10
60
90
410
2
3
3
8
0
3
3
Max.
ALL INPUT PULSES
100
10%
10
15
15
8
7
7
8
8
8
90%
1.91V
Min.
7C42X5-15
15
15
10
60
90
2
6
6
4
1
4
1
0
3
3
Max.
66.7
10
15
10
10
16
10
16
8
8
90%
10%
Min.
7C42X5-25
25
10
10
25
15
60
90
2
6
1
6
1
0
3
3
3 ns
CY7C4275
CY7C4285
4275–5
Max.
40
15
25
12
12
15
15
20
15
20
Page 5 of 21
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns