NJU6624 New Japan Radio Co., Ltd., NJU6624 Datasheet
NJU6624
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NJU6624 Summary of contents
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... stru ctio r( spla y Data RAM (DD RAM x8b its Character Icon Display Generator RAM RAM (MK RAM) (CG RAM) 12x5bits 5x7x32bits NJU6624A/B NJU6624A/B SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 ...
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... LED driver drives LED as indicator on athers. Key request signal output terminal. Key scanning input terminals. LCD segment driving signal output / Key scanning output terminals. LCD segment driving signal output terminals LCD common driving signal output terminals Icon common driving signal output terminals NJU6624A/B NJU6624A/B 145KHz ). ...
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... NJU6624A/B NJU6624A/B -(1F) -(1F) should be written should be written Character Pattern (CG RAM Data Upper Lower bit ...
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... Display RAM (MK RAM) (1-6)Icon Display RAM (MK RAM) The NJU6624A/B can display maximum 60 Icons. The NJU6624A/B can display maximum 60 Icons. The Icon Display can be controlled by writing the Data in MK RAM corresponds to the Icon. The Icon Display can be controlled by writing the Data in MK RAM corresponds to the Icon. ...
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... Note) Display Note) Display The NJU6624A/B generate “SPACE” automatically on the segment terminals. Which are six times number of The NJU6624A/B generate “SPACE” automatically on the segment terminals. Which are six times number of lines, regardless the smooth scroll function. In busy of the smooth scroll operation, this “SPACE” scrolls also with lines, regardless the smooth scroll function. In busy of the smooth scroll operation, this “ ...
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... When the NJU6624A/B detect the key-in by the key scan circuit, it outputs “H” signal as the request signal from When the NJU6624A/B detect the key-in by the key scan circuit, it outputs “H” signal as the request signal from the “ ...
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... NJU6624 NJU6624A/B NJU6624A/B VLCD2 VLCD2 VSS VSS KH2 KH1 KH0 OFF D5 D4 ...
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... Note : In case of can not read out correct. Note : In case of can not read out correct. NJU6624 NJU6624 NJU6624A/B NJU6624A/B ON OFF OFF ...
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... By Hardware (2-2)Initialization By Hardware The NJU6624A/B incorporates RESET terminal to initialize the all system. When the "L" level input over 1.2ms to The NJU6624A/B incorporates RESET terminal to initialize the all system. When the "L" level input over 1.2ms to the RESET terminal, reset sequence is executed. In this time, busy signal output during 250us (fosc=145kHz) the RESET terminal, reset sequence is executed. In this time, busy signal output during 250us (fosc=145kHz) after RESET terminal goes to " ...
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... The NJU6624A of master LSI and the B of slave LSI don’t synchronize the frame frequency, so that the timings of The NJU6624A of master LSI and the B of slave LSI don’t synchronize the frame frequency, so that the timings of blinking between version A and B are not synchronized ...
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... The NJU6624A/B incorporates two registers, an Instruction Register (IR) and a Data Register(DR). The NJU6624A/B incorporates two registers, an Instruction Register (IR) and a Data Register(DR). These two registers store control information temporarily to allow interface between NJU6624A/B and MPU or These two registers store control information temporarily to allow interface between NJU6624A/B and MPU or peripheral ICs operating different cycles ...
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... Display is is set into the address counter. Display (I/D) and DB (I/D) and DB (S), as shown below. (S), as shown below NJU6624A/B NJU6624A ...
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... Alternating display (2)Blink display example (2)Blink display example Address to the right or left without writing or reading display data. to the right or left without writing or reading display data NJU6624A/B NJU6624A (D) and DB (D) and DB (B), as shown below ...
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... Initial status is ”L” shown below. as shown below NJU6624A/B NJU6624A Initial status is ”L” ...
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... Note3) Only character is shifted by Dot shift instruction D11 D10 shift. 1 1dot-shift to the left. 0 2dot-shift to the left. 1 3dot-shift to the left. 0 4dot-shift to the left. 1 5dot-shift to the left. 0 Don't Care. 1 NJU6624A/B NJU6624A SC2 SC1 SC0 ...
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... NJU6624A/B NJU6624A/B 2dot smooth scroll 2dot smooth scroll Number of Number of dot-shift dot-shift 2dot-shift 4dot-shift The number of dot- Display Shift shift is reset to " ...
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... Seems to execute Display Shift 2dot-shift 2dot-shift write character code write character code Write to RAM to the address (00)H. to the address (00)H. < LCD Display > < LCD Display > NJU6624A/B NJU6624A/B <DD RAM address> <DD RAM address> Setting address in (AC) Setting address in (AC) Scroll Scroll RAM RAM 1ch ...
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... Example of 3 dot smooth scroll (NJU6624A+NJU6624B 23-character,1-line Display) Example of 3 dot smooth scroll (NJU6624A+NJU6624B 23-character,1-line Display) The smooth scroll sequence, which is executed by the 3dot-shift instruction, LCD display and DD RAM address The smooth scroll sequence, which is executed by the 3dot-shift instruction, LCD display and DD RAM address movement are shown as follows ...
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... NJU6624A/B NJU6624A ...
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... MK RAM MK RAM : : (10) (10) - (1D) - (1D AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0 RAM address RAM address CG RAM CG RAM : : (00) (00) - (FE) - (FE NJU6624A/B NJU6624A AD4 AD3 AD2 AD1 AD0 DD/MK RAM. RAM ...
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... DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0 KL3 KL2 KL1 KL0 NJU6624A/B NJU6624A DM4 DM3 DM2 DM1 DM0 DC4 DC3 DC2 DC1 DC0 ...
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... If the power supply conditions for the correct operation of the internal reset circuits are not satisfied, the If the power supply conditions for the correct operation of the internal reset circuits are not satisfied, the NJU6624A/B must be initialized by the instruction. NJU6624A/B must be initialized by the instruction. ...
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... LCD frame frequency (5-2)Relation between oscillation frequency and LCD frame frequency As the NJU6624A/B incorporate oscillation capacitor and resistor for CR oscillation, 145kHz oscillation is avail- As the NJU6624A/B incorporate oscillation capacitor and resistor for CR oscillation, 145kHz oscillation is avail- able without any external components. ...
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... The inputs data and latched at rising edge of shift clock (SCL) and the first 16-bit data are fetched into the NJU6624A/B at the rising edge of chip select (CS). The data over than 16 bits are ignored. If the input into the NJU6624A/B at the rising edge of chip select (CS). The data over than 16 bits are ignored. If the input data are less than 16 bits,they are ignored at the rising edge of " ...
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... SEG to SEG ) respectively, and measured when the current I ) respectively, and measured when the current load condition load condition. LCD1 LCD1 NJU6624A/B NJU6624A/B VLCD2 or V VLCD2 and ) and SS, SS VLCD2 VLCD2 or V ...
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... KDD t SRWD t CRWD t CH2 CYCE t SISU SIH Input data sequence Input data sequence KDD Output Output Input data sequence Input data sequence NJU6624A/B NJU6624A/B +8.0V, Ta=25 +8.0V, Ta= MIN. MAX. CONDITION 1 - 300 - 100 - 300 - fig.1 300 - 300 - 300 - - 300 - 300 fig.2 ...
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... VSS VLCD VLCD V1 V1 SEG1 SEG1 VSS VSS VLCD VLCD V1 V1 SEG2 SEG2 VSS VSS ........... NJU6624A/B NJU6624A ......... Keyscan wave form is Keyscan wave form 1 2 ...
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... VDD VLCD1 VLCD1 VLCD2 VLCD2 VSS VSS NJU6624A/B NJU6624A/B COM1 COM1 COM7 COM7 LCD Panel LCD Panel (12-character (12-character 1-line+Icon) 1-line+Icon) SEG1 SEG1 SEG71 SEG71 ...
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... VLCD1 VLCD2 VLCD2 VSS VSS NJU6624A/B NJU6624A/B COM1 COM1 COM7 COM7 LCD Panel LCD Panel (12-character (12-character SEG1 SEG1 1-line+Icon) 1-line+Icon) SEG71 SEG71 COM1 COM1 ...
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MEMO [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not ...