AD5293 Analog Devices, AD5293 Datasheet - Page 11

• Manufacturer Part Number: AD5293
• Description: Digital Potentiometer
• Manufacturer: Analog Devices

www.DataSheet4U.com
Preliminary Technical Data
THEORY OF OPERATION
The AD5293 digital potentiometer is designed to operate as a
true variable resistor for analog signals that remain within the
terminal voltage range of V
potentiometer wiper position is determined by the RDAC
register contents. The RDAC register acts as a scratchpad
register, allowing as many value changes as necessary to place
the potentiometer wiper in the correct position. The RDAC
register can be programmed with any position setting using the
standard SPI serial interface by loading the 16-bit data-word.
The AD5293 also features a patented 1% end-to-end resistor
tolerance. This simplifies precision, rheostat mode, and open-
loop applications where knowledge of absolute resistance is
critical.
RDAC REGISTER
The RDAC register directly controls the position of the digital
potentiometer wiper. For example, when the RDAC register is
loaded with all zeros, the wiper is connected to Terminal B of
the variable resistor. The RDAC register is a standard logic
register; there is no restriction on the number of changes
allowed. The RDY pin can be used to monitor the completion of
a write to or read from the RDAC register. Prior to 20-TP
activation, the AD5293 presets to mid-scale on power-up.
WRITE PROTECTION
On power-up, the serial data input register write command for
the RDAC register is disabled. The RDAC write protect bit, C1
of the control register (Table 8), is set to 0 by default. This
disables any change of the RDAC register content regardless of
the software commands, except that the RDAC register can be
refreshed to midscale using the software reset command
(command #3) or through hardware by the RESET pin. To
enable programming of the variable resistor wiper position
(programming the RDAC register) the write protect bit C1 of
the control register must first be programmed. This is
accomplished by loading the serial data input register with
Command #4 (Table 7).
BASIC OPERATION
The basic mode of setting the variable resistor wiper position
(programming the RDAC register) is accomplished by loading
the serial data input register with Command #1 (Table 7) and
the desired wiper position data. The RDY pin can be used to
monitor the completion of this RDAC register write command.
(Command #2, Table 7) can be used to readback the contents of
the RDAC register. After issuing the readback command the
RDY pin can be monitored to indicate when the data is
available to be read out on SDO in the next SPI operation.
Instead of monitoring the RDY pin, a minimum delay(Table 3)
can be implemented when executing a write or read command.
Table 6, provides an example listing of a sequence of serial data
SS
< V
TERM
< V
DD
. The digital
Rev. PrA | Page 11 of 15
input (DIN) words with the serial data output appearing at the
SDO pin in hexadecimal format for an RDAC write and read.
Table 6. RDAC Register Write and Read
DIN
0x1802
0x0600
0x0800
0x0000
POWER-DOWN MODE
The AD5293 can be powered down by executing the software
powerdown command, command 6 (Table 7), and setting the
LSB to 1. This feature reduces the power supply current to
(TBD) µA and places the RDAC in a zero-power-consumption
state where Terminal Ax is open-circuited and the Wiper Wx is
connected to Terminal Bx.
RESET
A low to high transition of the hardware RESET pin loads the
RDAC Register with midscale. The AD5293 can also be reset
through software by executing command 3(Table 7).
SERIAL DATA INTERFACE
The AD5293 contains a serial interface ( SYNC , SCLK, DIN and
SDO), which is compatible with SPI interface standards, as well
as most DSPs. This device allows writing of data via the serial
interface to every register.
INPUT SHIFT REGISTER
For the AD5293 the input shift register is 16 bits wide (see
Figure 2). The 16-bit word consists of two unused bits (should
be set to zero), followed by four control bits, and ten RDAC
data bits. Data is loaded MSB first (Bit 15). The four control bits
determine the function of the software command (Table 7).
Figure 3 shows a timing diagram of a typical AD5293 write
sequence.
The write sequence begins by bringing the SYNC line low. The
SYNC pin must be held low until the complete data-word is
loaded from the DIN pin. When SYNC returns high, the serial
data-word is decoded according to the instructions in Table 7.
The command bits (Cx) control the operation of the digital
SDO
0xXXXX
0x1803
0x0600
0x0100
Prepare data read from RDAC
Action
Enable update of wiper position
Write 0x100 to the RDAC register,
Wiper moves to ¼ fullscale
position.
Register
NOP instruction 0 sends 16-bit
word out of SDO, where last 10-
bits contain the contents of the
RDACl Register.
AD5293