ASM1232LPS Alliance Semiconductor, ASM1232LPS Datasheet - Page 3

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ASM1232LPS

Manufacturer Part Number
ASM1232LPS
Description
5V uP Power Supply Monitor and Reset Circuit
Manufacturer
Alliance Semiconductor
Datasheet

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January 2005
rev 1.5
Detailed Description
The ASM1232LP/LPS monitors the microprocessor or
microcontroller power supply and generates reset signal,
both active HIGH and Active LOW, that halt processor
operation whenever the power supply voltage levels are
outside a predetermined tolerance.
RESET and RESET outputs
RESET is an active HIGH signal developed by a CMOS
push-pull output stage and is the logical opposite to RESET.
RESET is an active LOW signal. It is developed with an open
drain driver. A pull up resistor of typical value 10kΩ to 50kΩ is
required to connect with the output.
Trip Point Tolerance Selection
The TOL input is used to determine the level V
below 5V without asserting a reset. With TOL conected to
V
below 4.5V. RESET and RESET become active when the
V
After V
and RESET remain active for a minimum time period of
250ms. On power-down, once V
threshold RESET stays LOW and is guaranteed to be 0.4V or
less until V
is valid down to a V
CC
CC
, RESET and RESET become active whenever V
TOL = GND
TOL = V
falls below 4.75V if TOL is connected to ground.
Tolerance
Select
CC
has risen above the trip point set by TOL, RESET
CC
CC
drops below 1.2V. The active HIGH reset signal
CC
Tolerance
level of 1.2V also.
10%
5%
Notice: The information in this document is subject to change without notice
5V µP Power Supply Monitor and Reset Circuit
CC
4.25
Min
4.5
TRIP Point Voltage
falls below the reset
4.37
4.62
Nom
(V)
CC
can vary
4.49
4.74
CC
Max
falls
V
Figure 1: Timing Diagram : Power Up
RESET
Application Information
Manual Reset Operation
Push-button switch input, PBRST, allows the user to override
the internal trip point detection circuits and issue reset
signals. The pushbutton input is debounced and is pulled
HIGH through an internal 40kΩ resistor.
RESET
V
Figure 2: Timing Diagram : Power Down
CC
V
V
CC
CCTP
CCTP
(MAX)
(MIN)
V
CCTP
t
F
V
V
OH
t
OL
RPD
t
R
V
V
CCTP
CCTP
V
CCTP
(MIN)
t
RPU
ASM1232LP/LPS
(MAX)
V
V
OH
OL
3 of 10
RESET
RESET

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