LT1180A Linear Technology, LT1180A Datasheet - Page 6

• Manufacturer Part Number: LT1180A
• Description: Low Power 5V RS232 Dual Driver/Receiver with 0.1uF Capacitors
• Manufacturer: Linear Technology

LT1180A/LT1181A
PI FU CTIO S
TR1 IN, TR2 IN: RS232 Driver Input Pins. These inputs are
TTL/CMOS compatible. Inputs should not be allowed to
float. Tie unused inputs to V
TR1 OUT, TR2 OUT: Driver Outputs at RS232 Voltage
Levels. Driver output swing meets RS232 levels for loads
up to 3k. Slew rates are controlled for lightly loaded lines.
Output current capability is sufficient for load conditions
up to 2500pF. Outputs are in a high impedance state when
in shutdown mode, V
pin is active. Outputs are fully short-circuit protected from
V
damage the device if the overdrive is moderately current
limited. Short circuits on one output can load the power
supply generator and may disrupt the signal levels of the
other outputs. The driver outputs are protected against
ESD to 10kV for human body model discharges.
The RS232 line inputs of the LT1180A/LT1181A have on-
chip protection from ESD transients up to 10kV. The
protection structures act to divert the static discharge
safely to system ground. In order for the ESD protection to
function effectively, the power supply and ground pins of
the circuit must be connected to ground through low
impedances. The power supply decoupling capacitors and
charge pump storage capacitors provide this low imped-
ance in normal application of the circuit. The only con-
straint is that low ESR capacitors must be used for
bypassing and charge storage. ESD testing must be done
with pins V
connected with low ESR capacitors.
6
ESD PROTECTIO
–
U
+ 30V to V
U
CC
, V
+
L
– 30V. Applying higher voltages will not
, V
+
, V
U
CC
–
= 0V, or when the driver disable
, and GND shorted to ground or
U
CC
.
REC1 IN, REC2 IN: Receiver Inputs. These pins accept
RS232 level signals ( 30V) into a protected 5k terminating
resistor. The receiver inputs are protected against ESD to
provides 0.4V of hysteresis for noise immunity. Open
receiver inputs assume a logic low state.
REC1 OUT, REC2 OUT: Receiver outputs with TTL/CMOS
Voltage Levels. Outputs are in a high impedance state
when in shutdown mode to allow data line sharing. Outputs
are fully short-circuit protected to ground or V
power on, off or in the shutdown mode.
C1
These pins require two external capacitors C 0.1 F: one
from C1
be deleted if a separate 12V supply is available and con-
nected to pin C1
separate – 12V supply is connected to pin V
0.1 F
0.1 F
10kV for human body model discharges. Each receiver
+
, C1
+
+
+
PROTECTED
–
LINE PINS
to C1
TO 10kV
, C2
0.1 F
0.1 F
RS232
+
–
, C2
+
+
and another from C2
+
. Similarly, C2 should be deleted if a
1
2
3
4
5
6
7
8
9
DR2 OUT
RX2 IN
NC
C1
V
C1
C2
C2
V
–
+
–
: Commutating Capacitor Inputs.
+
–
+
–
ESD Test Circuit
LT1180A
DR1 OUT
RX1 OUT
RX2 OUT
ON/OFF
DR1 IN
DR2 IN
5V V
RX1 IN
GND
+
CC
to C2
18
17
16
15
14
13
12
11
10
–
–
RS232
LINE PINS
PROTECTED
TO 10kV
.
LT1180A • ESD TC
. C1 should
CC
with the
+
0.1 F