LT1990 Linear Technology, LT1990 Datasheet - Page 7

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LT1990

Manufacturer Part Number
LT1990
Description
Difference Amplifier
Manufacturer
Linear Technology
Datasheet

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The
G = 1, 10, unless otherwise noted. (Notes 4, 6)
±15V ELECTRICAL CHARACTERISTICS
SYMBOL
∆G
GNL
G/T
V
CMRR
V
V
V
PSRR
I
V
I
SR
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: ESD (Electrostatic Discharge) sensitive device. Extensive use of
ESD protection devices are used internal to the LT1990, however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum.
Note 4: The LT1990C/LT1990I are guaranteed functional over the
operating temperature range of – 40°C to 85°C.
Note 5: The LT1990C is guaranteed to meet the specified performance
from 0°C to70°C and is designed, characterized and expected to meet
specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1990I is guaranteed to meet
specified performance from –40°C to 85°C.
S
SC
CM
OS
OS
OSH
OUT
/T
denotes the specifications which apply over the temperature range of –40°C ≤ T
PARAMETER
Gain Error
Gain Nonlinearity
Gain vs Temperature
Input Voltage Range
Common Mode Rejection Ratio, RTI
Input Offset Voltage, RTI
Input Offset Voltage Drift, RTI
Input Offset Voltage Hysteresis, RTI
Power Supply Rejection Ratio, RTI
Minimum Supply Voltage
Supply Current
Output Voltage Swing
Output Short-Circuit Current
Slew Rate
CONDITIONS
V
LT1990, G = 1
LT1990A, G = 1
G = 10
V
G = 1
G = 10
G = 1 (Note 10)
G = 10 (Note 10)
Guaranteed by CMRR
V
LT1990
LT1990A
G = 1, 10
(Note 10)
(Note 11)
V
Guaranteed by PSRR
Short to V
Short to V
G = 1, V
OUT
OUT
CM
S
= ±1.35V to ±18V
= –250V to 250V
= ±10V
= ±10V
OUT
+
= ±10V
Note 6: G = 10 limits are guaranteed by correlation to G = 1 tests and gain
error tests at G = 10.
Note 7: Limits are guaranteed by correlation to –5V to 80V CMRR tests.
Note 8: V
V
Note 9: V
V
Note 10: This parameter is not 100% tested.
Note 11: Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25°C, but the
IC is cycled to 85°C I-grade (or 70°C C-grade) or –40°C I-grade (0°C
C-grade) before successive measurement.
S
S
= ±15V tests.
= ±15V tests.
S
S
= 3V limits are guaranteed by correlation to V
= 5V limits are guaranteed by correlation to V
A
≤ 85°C. V
S
= ±15V, R
±14.3
–250
MIN
0.2
58
67
78
10
3
L
= 10k, V
TYP
250
2
7
5
CM
S
S
LT1990
= 5V and
= 3V and
0.003
±1.35
MAX
0.67
0.35
0.03
250
280
0.9
6.7
= V
10
20
22
REF
ppm/°C
ppm/°C
= 0V,
UNITS
µV/°C
7
V/µs
1990f
mV
mA
mA
dB
dB
µV
dB
µA
%
%
%
%
%
V
V
V

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