LTC1148HV Linear Technology, LTC1148HV Datasheet - Page 15

• Manufacturer Part Number: LTC1148HV
• Description: High Efficiency Synchronous Step-Down Switching Regulators
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1148 series. These items are also illustrated graphi-
cally in the layout diagram of Figure 9. Check the following
in your layout:
1. Are the signal and power grounds segregated? The
2. Does the LTC1148 SENSE
LTC1148 signal ground Pin 11 must return to the (–)
plate of C
source of the N-channel MOSFET, anode of the
Schottky diode, and (–) plate of C
have as short lead lengths as possible.
close to R
able applications, the resistive divider R1, R2 must be
connected between the (+) plate of C
ground.
LTC1148 • F09
C
T
SENSE
OUT
. The power ground returns to the
and the (+) plate of C
U U
10nF
1k
3300pF
+
–
Figure 9. LTC1148 Layout Diagram (See Board Layout Checklist)
Pin 7 connect to a point
1 F
W
1
2
3
4
5
6
7
IN
P-DRIVE
V
C
INTV
I
SENSE
NC
TH
IN
T
, which should
OUT
OUT
CC
LTC1148
–
? In adjust-
and signal
BOLD LINES INDICATE HIGH CURRENT PATHS
N-DRIVE
NC (V
SENSE
U
PGND
SGND
SHDN
1000pF
NC
FB
+
)
14
13
12
11
10
9
8
SHUTDOWN
3. Are the SENSE
4. Does the (+) plate of C
5. Is the 1 F V
6. Is the Shutdown Pin 10 actively pulled to ground during
P-CHANNEL
with minimum PC trace spacing? The 1000pF capacitor
between Pins 7 and 8 should be as close as possible to
the LTC1148.
P-channel MOSFET as closely as possible? This capaci-
tor provides the AC current to the P-channel MOSFET.
between Pin 3 and power ground Pin 12? This capacitor
carries the MOSFET driver peak currents.
normal operation? The Shutdown pin is high imped-
ance and must not be allowed to float.
R2
R1
IN
LTC1148-3.3/LTC1148-5
decoupling capacitor connected closely
N-CHANNEL
+
–
L
D1
and SENSE
C
OUT
IN
C
R
IN
OUTPUT DIVIDER REQUIRED WITH
ADJUSTABLE VERSION ONLY
SENSE
connect to the source of the
V
V
+
OUT
+
–
–
+
IN
leads routed together
LTC1148
15