LTC1433 Linear Technology, LTC1433 Datasheet - Page 6

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LTC1433

Manufacturer Part Number
LTC1433
Description
450mA/ Low Noise Current Mode Step-Down DC/DC Converters
Manufacturer
Linear Technology
Datasheet

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OPERATION
LTC1433/LTC1434
FUNCTIONAL DIAGRA
Main Control Loop
The LTC1433/LTC1434 is a constant frequency, pulse-
width modulated current mode switching regulator. Dur-
ing normal operation, the internal P-channel power MOSFET
is turned on each cycle when the oscillator sets the RS
latch FF3, and turned off when the main current compara-
tor I
which the I
voltage on the I
GM. Pins V
tions section, allow GM to receive an output feedback
voltage V
dividers. When the load current increases, it causes a
slight decrease in V
which in turn causes the I
average inductor current matches the new load current.
6
SV
SHDN
SHDN
IN
U
COMP
AND
REF
V
CC
SV
FB
resets the latch. The peak inductor current at
POR
LBO
IN
PROG
COMP
from either the internal or external resistive
+
V
V
U
REF
CC
TH
(1.19V)
and V
pin , which is the output of error amplifier
resets the RS latch is controlled by the
U
LOBAT
FB
(Refer to Functional Diagram)
6V
OSENSE
+
relative to the 1.19V reference,
0.6V
TH
LBI
RUN/SS
I
TH
voltage to increase until the
, described in the Pin Func-
PLL LPF
V
C
REF
OSC
180k
30k
W
+
LIDET
PGND
SGND
GM
V
CO
SHIFT
FREQ
OSC
PLL
+
V
REF
50k
V
+
REF
OVDET
+ 89mV
PLLIN
POR
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 3 A current
source to charge up the soft start capacitor C
reaches 1.3V, the main control loop is enabled with the I
voltage clamped at approximately 30% of its maximum
value. As C
leased allowing normal operation to resume.
Comparator OVDET guards against transient overshoots
> 7.5% by turning off the P-channel power MOSFETs and
keeping them off until the fault is removed.
Low Current Operation
The LTC1433/LTC1434 have two internal P-channel
MOSFETs sized for low and high load current conditions.
At low load current, only the small MOSFET will be turned
on while at high load current both MOSFETs will be on.
V
SB
RB
SET
FF3
CK
D
SB
RB
FF1
FF2
Q
Q
Q
Q
Q
Q
SHDN
SS
continues to charge, I
SLOPE
COMP
I
COMP
I
DET
PEAK
+
+
120k
TH
12mV
60k
BSW
PWRV
is gradually re-
R
0.143
240k
IN
SENSE
SS
SSW
VOLTAGE
. When C
SELECT
60k
V
1433/34 FD
V
OSENSE
PROG
SS
TH

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