LTC1623 Linear Technology, LTC1623 Datasheet - Page 7

• Manufacturer Part Number: LTC1623
• Description: SMBus Dual High Side Switch Controller
• Manufacturer: Linear Technology

OPERATIO
SMBus Operation
SMBus is a serial bus interface that uses only two bus
lines, DATA and CLK, to control low power peripheral
devices in portable equipment. It consists of masters, also
known as hosts, and slave devices. The master of the
SMBus is always the one to initiate communications to its
slave devices by varying the status of the DATA and CLK
lines. The SMBus specification establishes a set of proto-
cols that devices on the bus must follow during commu-
nications.
The protocol that the LTC1623 uses is the Send Byte
Protocol. In this protocol, the master first sends out a Start
signal by switching the DATA line from high to low while
CLK is high. (Because there may be more than one master
on the same bus, an arbitration process takes place if two
masters attempt to take control of the DATA line simulta-
neously; the first master that outputs a one while the other
master is zero loses the arbitration and becomes a slave
itself.) Upon detecting this Start signal, all slave devices on
the bus wake up and get ready to shift in the next byte of
data.
The master then sends out the first byte. The first seven
bits of this byte consist of the address of the device that the
master wishes to communicate with. The last bit indicates
whether the command will be a read (logic one) or write
(logic zero). Because the LTC1623 is a slave device that
can only be written to by a master, it will ignore the ensuing
commands of the master if it wants to read from the
LTC1623, even if the address sent by the master matches
that of the LTC1623. After reception of the first byte, the
slave device (LTC1623) with the matching address then
DATA
CLK
START
1
U
0
Example of Send Byte Protocol to Slave Address 1011000 Turning GA and GB On
START
1
ADDRESS BYTE
ADD1 A
1
(PROGRAMMABLE)
COMMAND
0
Figure 1. Daisy-Chaining Multiple SMBus Devices
0
A
START
0
(WRITE)
ADD2 A
0
ACK
COMMAND A
acknowledges the master by pulling the data line low
before the rising edge of the ninth clock cycle.
By now, all other nonmatching slave devices will have
gone back to their original standby states to wait for the
next start signal. Meanwhile, upon receiving the acknowl-
edge from the matching slave, the master then sends out
the command byte. In the case of the LTC1623, the two
LSBs of this second byte from the master are the signals
controlling the status of the external switches; a digital
“one” turns on the charge pump to drive up the output gate
voltage while a digital “zero” shuts down the charge pump
and discharges the output gate voltage to zero.
After receiving the command byte, the slave device
(LTC1623) needs to again acknowledge the master by
pulling the DATA line low on the following clock cycle. The
master then ends this Send Byte Protocol by sending the
Stop signal, which is a transition from low to high on the
DATA line while the CLK line is high. Valid data is shifted
into the output latch on the last acknowledge signal; the
external switch will not be enabled, however, until the Stop
signal is detected. This double-buffering feature allows
the user to daisy-chain several differently addressed SMBus
devices such that their output executions are synchronous
to the Stop signal even though valid data were loaded into
their output latches at different times. Figure 1 shows an
example of this special protocol. If somehow either the
Start or the Stop signal is detected in the middle of a byte,
the slave device (LTC1623) will regard this as an error and
reject all previous data. Other than the Stop and Start
conditions, DATA must be stable during CLK high; DATA
can change state only during CLK low.
0
0
START
0
ADD3 A
COMMAND BYTE
0
COMMAND A
0
0
STOP
1623 F01
(GB ON)(GA ON)
1
1
LTC1623
ACK
1623 TD02
STOP
7