LTC1735 Linear Technology, LTC1735 Datasheet - Page 12

• Manufacturer Part Number: LTC1735
• Description: High Efficiency Synchronous Step-Down Switching Regulator
• Manufacturer: Linear Technology

LTC1735
APPLICATIO S I FOR ATIO
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot af-
ford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy
or Kool M
core size for a fixed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance re-
quires more turns of wire and therefore copper losses will
increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool M . Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
that do not increase the height significantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for use
with the LTC1735: An N-channel MOSFET for the top
(main) switch and an N-channel MOSFET for the bottom
(synchronous) switch.
The peak-to-peak gate drive levels are set by the INTV
voltage. This voltage is typically 5.2V during start-up (see
EXTV
old MOSFETs must be used in most LTC1735 applica-
tions. The only exception is when low input voltage is
expected (V
MOSFETs (V
attention to the BV
well; many of the logic level MOSFETs are limited to 30V
or less.
12
CC
pin connection). Consequently, logic-level thresh-
®
IN
GS(TH)
cores. Actual core loss is independent of
< 5V); then, sub-logic level threshold
DSS
U
< 3V) should be used. Pay close
specification for the MOSFETs as
U
W
U
CC
Selection criteria for the power MOSFETs include the “ON”
resistance R
input voltage and maximum output current. When the
LTC1735 is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
The MOSFET power dissipations at maximum output
current are given by:
where is the temperature dependency of R
is a constant inversely related to the gate drive current.
Both MOSFETs have I
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
V
with larger MOSFETs, while for V
losses rapidly increase to the point that the use of a higher
R
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short-circuit when the
duty cycle in this switch is nearly 100%.
The term (1 + ) is generally given for a MOSFET in the
form of a normalized R
voltage MOSFETs. C
MOSFET characteristics. The constant k = 1.7 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
Kool M is a registered trademark of Magnetics, Inc.
IN
DS(ON)
= 0.005/ C can be used as an approximation for low
Main Switch Duty Cycle
P
P
Synchronous Switch Duty Cycle
< 20V the high current efficiency generally improves
MAIN
SYNC
device with lower C
k V
V
V
DS(ON)
V
OUT
IN
IN
IN
–
V
2
IN
V
I
I
, reverse transfer capacitance C
MAX
MAX
OUT
RSS
DS(ON)
2
I
2
MAX
C
R losses while the topside
1
RSS
is usually specified in the
RSS
vs Temperature curve, but
V
2
V
OUT
IN
actually provides higher
R
f
1
IN
DS ON
> 20V the transition
(
R
V
)
IN
DS ON
(
–
V
IN
DS(ON)
V
OUT
)
and k
RSS
,