LTC3452 Linear Technology, LTC3452 Datasheet - Page 6

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LTC3452

Manufacturer Part Number
LTC3452
Description
Synchronous Buck-Boost MAIN/CAMERA White LED Driver
Manufacturer
Linear Technology
Datasheet

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PI FU CTIO S
LTC3452
V
5.5V). Recommended bypass capacitor to GND is 2.2µF
ceramic or larger. Connect to PV
EN
for Low Power LED Bank. Active high. For constant I
operation, connect the EN
>1.2V). For EN
current source outputs are Hi-Z (if both EN
<0.2V, the part is in shutdown and the input supply current
drops to ~6µA). For brightness control between zero
current and I
of frequency ≥10kHz. The low power LED bank currents
will be equal to a percentage of I
The EN
I
Pin. A resistor to ground programs each low power bank
current source output maximum to I
(0.8V/R
control also via EN
LED
Current Source Outputs for Low Power LED Bank Current
Biasing. Connect each low power LED between V
an individual LED
connected to V
GND (Pins 9 and 11): Signal Ground Pins. Connect
together and to PGND (Pin 18) and Exposed Pad ground
(Pin 21).
LED
Current Source Outputs for High Power LED Bank Current
Biasing. Connect each high power LED between V
an individual LED
connected to V
6
SETL
IN
U
L
(Pin 1): Signal Voltage Input Supply Pin (2.7V ≤ V
(Pin 2): Enable Input Pin and PWM Brightness Control
L1
H1
(Pin 3): Low Power LED Bank Current Programming
, LED
L
to LED
ISETL
pin is high impedance and should not be floated.
U
MAXL
). Enabled by EN
H2
L5
L
OUT
OUT
(Pins 10, 12): Individual Low Dropout
voltage <0.2V, all low power bank LED
Hx
, drive the EN
(Pins 4 to 8): Individual Low Dropout
Lx
.
.
L
pin. Unused LED
pin. Unused LED
U
.
L
pin to V
L
L
pin with a PWM waveform
(Pin 2). PWM brightness
MAXL
IN
(Pin 20).
Lx
Hx
as given in Table 1.
IN
LEDLx|MAX
outputs should be
outputs should be
(or any voltage
L
and EN
= 256 •
OUT
OUT
MAXL
H
IN
and
and
are
I
ming Pin. A resistor to ground programs each high power
bank current source output to I
Enabled by EN
EN
Active high. The EN
be floated.
V
Amplifier Output. Recommended compensation capacitor
to GND is 0.1µF ceramic or larger.
V
bypass capacitor to GND is 4.7µF ceramic.
SW2 (Pin 17): Switching Node Pin. Connected to internal
power switches C and D. External inductor connects
between SW1 and SW2. Recommended value is 4.7µH.
PGND (Pin 18): Power Ground Pin. Connect to GND (Pins
9 and 11).
SW1 (Pin 19): Switching Node Pin. Connected to internal
power switches A and B. External inductor connects
between SW1 and SW2. Recommended value is 4.7µH.
PV
V
Exposed Pad (Pin 21): Heat Sink Ground. Connect to GND
(Pins 9 and 11) and solder to PCB ground for electrical
contact and rated thermal performance.
SETH
C
OUT
IN
H
IN
(Pin 15): Compensation Point for the Internal Error
(Pin 1).
(Pin 14): Enable Input Pin for High Power LED Bank.
(Pin 20): Power Voltage Input Supply Pin. Connect to
(Pin 13): High Power LED Bank Current Program-
(Pin 16): Buck-Boost Output Pin. Recommended
H
(Pin 14).
H
pin is high impedance and should not
LEDHx
www.DataSheet4U.com
= 768(0.8V/R
ISETH
3452f
).

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