LTC3878 Linear Technology Corporation, LTC3878 Datasheet - Page 16

• Manufacturer Part Number: LTC3878
• Description: Wide Operating Range No RSENSE Step-Down Controller
• Manufacturer: Linear Technology Corporation

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APPLICATIONS INFORMATION
LTC3878
Regulator output current is negative when I
0V and 0.8V and positive when I
maximum full-scale set-point of 2.4V. In normal operating
conditions the RUN/SS pin will continue to charge positive
until the voltage is equal to INTV
INTV
Whenever INTV
device enters undervoltage lockout (UVLO). In a UVLO
condition, the switching outputs TG and BG are disabled.
At the same time, the RUN/SS pin is pulled down from
INTV
INTV
0.8V and begins a normal current limited soft-start. This
feature is important when regulator start-up is not initi-
ated by applying a logic drive to RUN/SS. Soft-start from
INTV
start-up oscillations caused by the regulator starting up
at INTV
due to inrush current.
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3878 circuits.
1. DC I
MOSFETs, inductor and PC board traces and cause the
effi ciency to drop at high output currents. In continuous
mode the average output current fl ows though the inductor
L, but is chopped between the top and bottom MOSFETs.
If the two MOSFETs have approximately the same R
then the resistance of one MOSFET can simply by summed
with the resistances of L and the board traces to obtain
the DC I
R
the output current varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
16
L
= 0.005Ω, the loss will range from 15mW to 1.5W as
CC
CC
CC
CC
2
CC(UVLOR)
Undervoltage Lockout
UVLO condition is removed, RUN/SS ramps from
UVLO release greatly reduces the possibility for
R losses. These arise from the resistances of the
to 0.8V with a 3μA current source. When the
2
R loss. For example, if R
CC
and then shutting down at INTV
drops below approximately 3.4V, the
TH
CC
is between 0.8V and the
.
DS(ON)
TH
= 0.01Ω and
is between
CC(UVLO)
DS(ON)
,
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is signifi cant
at input voltages above 20V.
3. INTV
and control currents.
4. C
ing the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I
capacitance to prevent the RMS current from causing ad-
ditional upstream losses in fuses or batteries.
Other losses, which include the C
MOSFET reverse recovery loss and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve effi ciency, the input
current is the best indicator of changes in effi ciency. If you
make a change and the input current decreases, then the
effi ciency has increased. If there is no change in input
current there is no change in effi ciency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
resistance of C
charge C
regulator to return V
this recovery time, V
or ringing that would indicate a stability problem. The I
pin external components shown in the Design Example will
provide adequate compensation for most applications.
A rough compensation check can be made by calculating
the gain crossover frequency, f
amplifi er transconductance, R
sistor and feedback divider attenuation is assumed to be
0.8V/V
compensation is used on feedback and that C
dominant output pole.
f
IN
GCO
loss. The input capacitor has the diffi cult job of fi lter-
OUT
CC
=
OUT
. This equation assumes that no feed-forward
g
current. This is the sum of the MOSFET driver
LOAD
m EA
, generating a feedback error signal used by the
(
OUT
)
(ESR), where ESR is the effective series
•
. ΔI
R
C
OUT
OUT
OUT
LOAD
•
I
LIMIT
immediately shifts by an amount
to its steady-state value. During
1 6
can be monitored for overshoot
.
also begins to charge or dis-
•
C
2
GCO
is the compensation re-
• •
OUT
π
2
. g
R loss and suffi cient
1
C
ESR loss, bottom
m(EA)
OUT
•
OUT
is the error
V
0 8
OUT
.
sets the
3878f
TH