LTC3901 Linear Technology, LTC3901 Datasheet - Page 5

• Manufacturer Part Number: LTC3901
• Description: Secondary Side Synchronous Driver for Push-Pull and Full-Bridge Converters
• Manufacturer: Linear Technology

PI FU CTIO S
PV CC (Pin 1): Driver Supply Input. This pin powers the
ME and MF drivers. Bypass this pin to PGND using a 4.7µF
low ESR capacitor in close proximity to the LTC3901. This
pin should be connected to the same supply voltage as the
V
ME (Pin 2, 3): Driver Output for ME. This pin drives the
gate of the external N-channel MOSFET, ME.
PGND (Pin 4,13): Power Ground. Both drivers return to
this pin. Connect PGND to a high current ground node in
close proximity to the sources of ME and MF.
CSE
Input. Connect CSE
of ME and CSE
ME. The LTC3901 monitors the CSE inputs 250ns after ME
goes high. If the inductor current reverses and flows into
ME causing CSE
the LTC3901 pulls ME low. See the Current Sense section
for more details on choosing the resistance values for
R
TIMER (Pin 7): Timer Input. Connect this pin to an external
R-C network to program the timeout period. The LTC3901
resets the timer at every positive and negative transition of
the SYNC input. If the SYNC signal is missing or incorrect,
the LTC3901 pulls both ME and MF low once the TIMER
pin goes above the timeout threshold. See the Timer sec-
tion for more details on programming the timeout period.
TYPICAL PERFOR A CE CHARACTERISTICS
CC
CSE1
U
+
pin.
, CSE
to R
U
CSE3
–
(Pin 6, 5): ME Current Sense Differential
–
.
+
through a series resistor to the source of
to rise above CSE
20
18
16
14
12
10
8
6
4
–50
+
U
V
Temperature
through a series resistor to the drain
CC
C
LOAD
–25
Supply Current vs
= 4.7nF
W
0
TEMPERATURE (°C)
V
CC
25
= 5V
–
U
V
CC
by more than 10.5mV,
50
= 11V
75
100
3901 G15
125
GND (Pin 8,10): Signal Ground. All internal low power
circuitry returns to this pin. To minimize differential ground
currents, connect GND to PGND right at the LTC3901.
SYNC (Pin 9): Driver Synchronization Input. 0V at this pin
forces both ME and MF high after an initial negative pulse.
A subsequent positive pulse at SYNC input forces ME to
pull low, whereas a negative pulse forces MF to pull low.
The SYNC signal should alternate between positive and
negative pulses. If the SYNC signal is incorrect, the LTC3901
pulls both MF and ME low.
CSF
Input. Connect CSF
of MF and CSF
MF. The LTC3901 monitors the CSF inputs 250ns after MF
goes high. If the inductor current reverses and flows into
MF causing CSF
the LTC3901 pulls MF low. See the Current Sense section
for more details on choosing the resistance values for
R
MF (Pin 14, 15): Driver Output for MF. This pin drives the
gate of the external N-channel MOSFET, MF.
V
except the drivers are powered from this pin. Bypass this
pin to GND using a 1µF capacitor in close proximity to the
LTC3901.
CC
CSF1
+
(Pin 16): Power Supply Input. All internal circuits
, CSF
to R
30
25
20
15
10
5
0
V
vs Load Capacitance
0
CSF3
–
CC
T
A
(Pin 11, 12): MF Current Sense Differential
1
Supply Current
= 25°C
–
.
+
through a series resistor to the source of
2
to rise above CSF
3
+
through a series resistor to the drain
4
C
LOAD
5
V
(nF)
CC
6
= 11V
7
V
CC
–
8
by more than 10.5mV,
= 5V
3901 G16
9
10
LTC3901
5
3901f