LTC4360-1 Linear Technology, LTC4360-1 Datasheet - Page 6

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LTC4360-1

Manufacturer Part Number
LTC4360-1
Description
Overvoltage Protection Controller
Manufacturer
Linear Technology
Datasheet
LTC4360-1/LTC4360-2
OPERATION
Mobile devices like cell phones and MP3/MP4 players have
highly integrated subsystems fabricated from deep submi-
cron CMOS processes. The small form factor is accompanied
by low absolute maximum voltage ratings. The sensitive
electronics are susceptible to damage from transient or DC
overvoltage conditions from the power supply.
Failures or faults in the power adaptor can cause an over-
voltage event. So can hot-plugging an AC adaptor into the
power input of the mobile device (see LTC Application Note
88). Today’s mobile devices derive their power supply or
recharge their internal batteries from multiple alternative
inputs like AC wall adaptors, car battery adaptors and USB
ports. A user may unknowingly plug in the wrong adaptor,
damaging the device with a high or even a negative power
supply voltage.
The LTC4360 protects low voltage electronics from these
overvoltage conditions by controlling a low cost external
N-channel MOSFET confi gured as a pass transistor. At
power-up (V
overvoltage condition causes the delay cycle to continue
until a safe voltage is present. When the delay cycle
APPLICATIONS INFORMATION
The typical LTC4360 application protects 2.5V to 5.5V sys-
tems in portable devices from power supply overvoltage.
The basic application circuit is shown in Figure 1. Device
operation and external component selection is discussed
in detail in the following sections.
6
Figure 1. Protection from Input Overvoltage
V
5V
IN
IN
> 2.1V), a start-up delay cycle begins. Any
IN
ON
LTC4360-1
Si1470DH
GATE
GND
M1
PWRGD
OUT
436012 F01
C
10μF
OUT
V
5V
1.5A
OUT
completes, an internal high side switch driver slowly
ramps up the MOSFET gate, powering up the output at
a controlled rate and limiting the inrush current to the
output capacitor.
If the voltage at the IN pin exceeds 5.8V (V
GATE is pulled low quickly to protect the load. The
incoming power supply must remain below 5.7V
(V
restart the GATE ramp-up.
The LTC4360-1 has a CMOS compatible ON input. When
driven low, the part is enabled. When driven high, the
external N-channel MOSFET is turned off and the supply
current of the LTC4360-1 drops to 1.5μA. The PWRGD
pull-down releases during this low current sleep mode,
UVLO or overvoltage and the subsequent 130ms start-up
delay. After the start-up delay, GATE starts its slow ramp-
up and ramps higher than V
delay cycle. When that completes, PWRGD pulls low.
The LTC4360-2 has a GATEP pin that drives an optional
external P-channel MOSFET to provide protection against
negative voltages at IN.
Start-Up
When V
2.1V, the GATE driver is held low and the PWRGD pull-
down is high impedance. When V
ON (LTC4360-1) is held low, a 130ms delay cycle starts.
Any undervoltage or overvoltage event at IN (V
V
N-channel MOSFET to isolate the output from any input
transients that occur at start-up. When the delay cycle
completes, GATE starts its slow ramp-up.
GATE Control
An internal charge pump enhances the external MOSFET
with 6V from GATE to OUT. This allows the use of logic-
level N-channel MOSFETs. An internal 6V clamp between
GATE and OUT protects the MOSFET gate.
IN
IN(OV)
> 5.7V) restarts the delay cycle. This delay allows the
IN
– ΔV
is less than the undervoltage lockout level of
OV
) for the duration of the start-up delay to
GATE(TH)
IN
rises above 2.1V and
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to trigger a 65ms
IN
< 2.1V or
IN(OV)
436012f
),

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