LTC6906 Linear Technology, LTC6906 Datasheet - Page 5

• Manufacturer Part Number: LTC6906
• Description: Micropower
• Manufacturer: Linear Technology

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BLOCK DIAGRA
PI FU CTIO S
OUT (Pin 1): Oscillator Output. The OUT pin swings from
GND to V
150Ω. For micropower operation, the load resistance
must be kept as high as possible and the load capacitance
as low as possible.
GND (Pin 2): Ground.
DIV (Pin 3): Divider Setting Input. This three-level input
selects one of three internal digital divider settings, deter-
mining the value of N in the frequency equation. Tie to GND
for ÷1, leave floating for ÷3 and tie to V
floating, the LTC6906 pulls Pin 3 to mid-supply with a
2.5M resistor. When Pin 3 is floating, care should be taken
to reduce coupling from the OUT pin and its trace to Pin 3.
Coupling can be reduced by increasing the physical space
between traces or by shielding the DIV pin with grounded
metal.
SET (Pin 4): Frequency Setting Resistor Input. Connect a
resistor, R
frequency. For best performance use a precision metal- or
thin-film resistor of 0.5% or better tolerance and 50ppm/°C
U
V
SET
≅ V
V
U
+
GRD
SET
SET
R
with an output resistance of approximately
SET
≅ 650mV
, from this pin to GND to set the oscillator
6
2
4
5
U
V
GND
SET
GRD
+
DECOUPLING
20Ω
NETWORK
I
W
SET
BUFFER
= I
FB
800pF
V
V
SET
SET
+
for ÷10. When left
I
FB
FREQUENCY-TO-CURRENT
I
FB
CONVERTERS
–
+
f
OSC
OP AMP
f
OSC
(MASTER OSCILLATOR)
or better temperature coefficient. For lower accuracy
applications, an inexpensive 1% thick-film resistor may be
used. Limit the capacitance in parallel with R
than 10pF to reduce jitter and to ensure stability. Capaci-
tance greater than 10pF could cause the LTC6906 internal
feedback circuits to oscillate. The voltage on the SET pin
is approximately 650mV and decreases with temperature
by about –2.2mV/°C.
GRD (Pin 5): Guard Signal. This pin can be used to reduce
PC board leakage across the frequency setting resistor,
R
pin and shunts leakage current away from the SET pin. To
control leakage, connect a bare copper trace (a trace with
no solder mask) to GRD and loop it around the SET pin and
all PC board metal connected to SET.
V
internally decoupled with a 20Ω resistor in series with an
800pF capacitor. No external decoupling capacitor is
required for OUT pin loads less than 50pF. V
kept reasonably free of noise and ripple.
+
SET
= 1MHz • 100kΩ/R
(Pin 6): Voltage Supply (2.25V to 3.6V). This supply is
CONTROLLED
OSCILLATOR
VOLTAGE
. The GRD pin is held within a few millivolts of the SET
SET
f
OSC
PROGRAMMABLE
THREE-LEVEL
(÷1, ÷3, ÷10)
DIVIDER (n)
DETECTOR
INPUT
DIVIDER
SELECT
150Ω DRIVER
LTC6906
V
5M
+
+
SET
5M
OUT
should be
DIV
6906 BD
to less
3
1
6906fa
5