irs2153spbf International Rectifier Corp., irs2153spbf Datasheet - Page 9

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irs2153spbf

Manufacturer Part Number
irs2153spbf
Description
Self-oscillating Half-bridge Driver Ic
Manufacturer
International Rectifier Corp.
Datasheet
Functional Description
Under-voltage Lock-Out Mode (UVLO)
The under-voltage lockout mode (UVLO) is defined as the state
the IC is in when V
IRS2153(1)D under voltage lock-out is designed to maintain an
ultra low supply current of less than 170 P A, and to guarantee the
IC is fully functional before the high and low side output drivers
are activated. During under voltage lock-out mode, the high and
low-side driver outputs HO and LO are both low.
Supply voltage
Fig. 1 shows an example of supply voltage. The start-up capacitor
(C
the start-up current drawn by the IC. This resistor is chosen to
provide sufficient current to supply the IRS2153(1)D from the DC
bus. C
above the UVLO threshold for one half cycle of the line voltage as
it will only be charged at the peak, typically 0.1 uF. It will be
necessary for R
The use of a two diode charge pump made of DC1, DC2 and
CVS (Fig. 2) from the half bridge (V
the above approach is simplest and the dissipation in R
not be unacceptably high.
The supply resistor (R
supply current is available over all operating conditions.
Once the capacitor voltage on V
V
+ AC Rectified Line
- AC Rectified Line
+ AC Rectified Line
- AC Rectified Line
CCUV+
VCC
CVCC
CVCC
RVCC
RVCC
) is charged by current through supply resistor (R
, the IC turns on and HO and LO begin to oscillate.
VCC
should be large enough to hold the voltage at Vcc
CT
RT
COM
VCC
CT
COM
RT
RT
CT
VCC
Fig. 1 Typical Connection Diagram
VCC
RT
CT
1
2
3
4
CC
1
2
3
4
to dissipate around 1 W.
Fig. 2 Charge pump circuit
is below the turn-on threshold of the IC. The
VCC
) must be selected such that enough
CC
8
7
6
5
reaches the start-up threshold
8
7
6
5
VB
HO
VS
LO
S
VB
VS
) is also possible however
HO
LO
CBOOT
CBOOT
MHS
MLS
DC2
MLS
MHS
DC1
CVS
VCC
L
VCC
L
) minus
should
RL
RL
Bootstrap MOSFET
The internal bootstrap FET and supply capacitor (C
the supply voltage for the high side driver circuitry. The internal
boostrap FET only turns on when LO is high. To guarantee that
the high-side supply is charged up before the first pulse on pin
HO, the first pulse from the output drivers comes from the LO pin.
Normal operating mode
Once the V
increases to approximately V
capacitor starts charging. Once the CT voltage reaches V
(about 1/3 of V
turns on with a delay equivalent to the deadtime (t
voltage reaches V
goes down to approximately ground (V
discharges and the deadtime circuit is activated. At the end of the
deadtime, HO goes high. Once the CT voltage reaches V
goes low, RT goes high again, the deadtime is activated. At the
end of the deadtime, LO goes high and the cycle starts over
again.
The following equation provides the oscillator frequency:
This equation can vary slightly from actual measurements due to
internal comparator over- and under-shoot delays. For a more
accurate determination of the output frequency, the frequency
characteristic curves should be used (RT vs. Frequency, page 3).
Shut-down
If CT is pulled down below V CTSD (approximately 1/6 of V
an external circuit, CT doesn’t charge up and oscillation stops.
LO is held low and the bootstrap FET is off. Oscillation will
resume once CT is able to charge up again to V
CCUV+
CC
threshold is passed, the MOSFET M1 opens, RT
), established by an internal resistor ladder, LO
CT+
f
(approximately 2/3 of V
~
. 1
453
CC
u
(V
1
RT
CC
-V
u
RT+)
IRS2153(1)D
CT
RT-
and the external CT
CC
), the CT capacitor
), LO goes low, RT
CT-
d
.
). Once the CT
BOOT
) comprise
CT-,
CC
) by
HO
CT
-
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