ltc1654cgn-trpbf Linear Technology Corporation, ltc1654cgn-trpbf Datasheet
ltc1654cgn-trpbf
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ltc1654cgn-trpbf Summary of contents
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... The LTC1654 also has shutdown capabil- ity, power-on reset and a clear function to 0V. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5396245. ...
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... Input Code = ±10%) REFHIA, REFHIB = 4.096V ( ±10%) REFHIA, REFHIB = 2.048V (V CC Input Code = 16383 U W ORDER PART TOP VIEW NUMBER OUT B LTC1654CGN 14 REFHI B LTC1654IGN 13 REFLO B 12 AGND 11 REFLO A GN PART MARKING 10 REFHI OUT A 1654 GN PACKAGE 1654I = 125° ...
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ELECTRICAL CHARACTERISTICS ture range, otherwise specifications are at T REFHI B = 4.096V (V = 5V), REFHI A, REFHI B = 2.048V (V CC SYMBOL PARAMETER AC Performance Voltage Output Slew Rate Voltage Output Settling Time Digital Feedthrough Midscale Glitch ...
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LTC1654 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T REFHI A, REFHI B = 4.096V (V = 5V), REFHI A, REFHI B = 2.048V (V CC SYMBOL PARAMETER Switching Characteristics (V = 2.7V to 5.5V SDO Output ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS Supply Current vs Logic Input Voltage 3.0 1 LOGIC INPUT VOLTAGE (V) 1654 G07 Midscale Glitch—Fast Mode V OUT 10mV/DIV CS/LD 2V/DIV TIME (1µs/DIV) 1654 G10 Large-Signal ...
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LTC1654 CTIO (Pins 1, 8): The Gain Gain of 1 1/2 1 1/2 1/2 Pin. When this pin is tied to V OUT be REFLO ...
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DIAGRA S LTC1654 1654fb 7 ...
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LTC1654 U OPERATIO Serial Interface The data on the SDI input is loaded into the shift register on the rising edge of SCK. The MSB is loaded first. The Clock is disabled internally when CS/LD is high. Note: SCK must ...
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U OPERATIO Voltage Output The LTC1654 comes complete with rail-to-rail voltage output buffer amplifiers. These amplifiers will swing to within a few millivolts of either supply rail when unloaded and to within a 450mV of either supply rail when sinking ...
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LTC1654 U OPERATIO Table 1. CONTROL Load Input Register Update (Power-Up) DAC Register Load Input Register n, Update (Power-Up) All 0 0 ...
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U U APPLICATIO S I FOR ATIO Rail-to-Rail Output Considerations Rail-to-rail DACs take full advantage of the supply range available to them, but cannot produce output voltages above V or below ground. See Figure 2a REFLO is tied ...
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LTC1654 U U DEFI ITIO S Resolution (n): Resolution is defined as the number of digital input bits (n also the number of DAC output n states (2 ) that divide the full-scale range. Resolution does not imply ...
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U TYPICAL APPLICATIO S This circuit shows how to use an LTC1654 and make a wide bipolar output swing 14-bit DAC with an offset that can be digitally programmed set by loading the appropriate code ...
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LTC1654 U TYPICAL APPLICATIO S µP 14 Dual 14-Bit Voltage Output DAC 2.7V TO 5.5V 0.1µF LTC1654 1 CLR OUTPUT OUT SCK ...
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... FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... DAC in MS8 Package. OUT Output Swings from GND to REF. REF Input Can Be Tied Low Cost, 10ppm Drift Ultralow Drift 3ppm/°C, Initial Accuracy: 0.04% Low Drift 10ppm/°C, Initial Accuracy: 0.05% LT/LT 0705 REV B • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2000 1654fb ...