mcs7710 MosChip, mcs7710 Datasheet
mcs7710
Related parts for mcs7710
mcs7710 Summary of contents
Page 1
... Universal Serial Bus (USB) input and an enhanced UART port. This device contains all the necessary logic to communicate with the host computer via the USB Bus. In addition, the MCS7710 contains a 3.3V regulator, operates in Bus-Powered mode, and has a reduced frequency (6 MHz) crystal oscillator. This combination of features allows significant cost ...
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... MCS7710 USB-1.1 to Single Serial Port DP USB Interface DM Serial Interface Engine XTAL1 PLL & Clock XTAL2 Generator TEST TSTMODE Page 2 Block Diagram Descriptor Table FIFO FIFO UART TX, nRTS, nDTR RX, nCTS, nDSR nRI, nCD Rev. 1.1 ...
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... XTAL1 3 XTAL2 4 GND 5 TSTPLL 6 TSTMODE 7 GND 3.3V 11 RESET 12 Rev. 1.1 USB-1.1 to Single Serial Port Pin-Out Diagram MCS7710CQ MCS7710 36 N.C. nCTS nRTS 31 3.3V 30 GND nDSR 26 nCD 25 N.C. Page 3 ...
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... MCS7710 USB-1.1 to Single Serial Port Pin Assignments Name Pin Type XTAL1 3 I XTAL2 4 O TSTPLL 6 I TSTMODE I I/O RESET 12 I nCD 26 I nDSR nRTS nCTS 35 I nDTR 37 O nRI 40 I VOUT 48 PWR 5, 8, 13, 14, GND ...
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... USB-1.1 to Single Serial Port USB Interface All standard USB requests received from the host are processed on-board without the need of firmware intervention. The MCS7710 supports Bus- Powered operation only. The USB interface to the host controller includes a Control endpoint, a Bulk- In endpoint, a Bulk-Out endpoint and an Interrupt endpoint ...
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... MCS7710 USB-1.1 to Single Serial Port UART Register Set: The UART has 10 registers. Mapping is dependent on the Line Control Register (LCR). Register Offset R/W Bit[7] Bit[6] Name THR 0 W RHR 0 R IER 1 R/W RHR FCR 2 W Trigger Level FIFOs ISR 2 R Enabled LCR 3 R/W DLE MCR ...
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... Logic 1 = Enable the Receiver Status Interrupt (Normal Mode) Logic 0 = Disable the Modem Status Interrupt Logic 1 = Enable the Modem Status Interrupt Logic 0 = Disable Sleep-Mode Logic 1 = Enable Sleep-Mode (the internal clock of the channel is switched off) Reserved Reserved Reserved MCS7710 Bit[2] Bit[1] Bit[0] Rx Stat THRE RxRdy Interrupt Interrupt ...
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... MCS7710 USB-1.1 to Single Serial Port FIFO Control Register: The FCR controls the UART behavior in various modes. Register: FCR Description: FIFO Control Register Offset: 2 Permissions: Write Bit[7] Bit[6] RHR Trigger Level Bit Name Enable 0 FIFO Mode Flush 1 RHR Flush 2 THR 3 Reserved 5, 4 Reserved ...
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... Receiver Status Error or address bit detected in 9-bit mode Receiver Data Available Receiver Time Out Transmitter THR Empty Modem Status Change Bit[5] Bit[4] Bit[3] Interrupt Priority (Enhanced Mode) MCS7710 USB-1.1 to Single Serial Port ISR[5:0] 6’b000001 6’b000110 6’b000100 6’b001100 6’b000010 6’b000000 Bit[2] Bit[1] ...
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... MCS7710 USB-1.1 to Single Serial Port Line Control Register: The LCR specifies the data format that is common to both transmitter and receiver. Register: LCR Description: Line Control Register Offset: 3 Permissions: Read/Write Access Condition: LCR[7] =0 Bit[7] Bit[6] Tx DLE Break LCR[1:0]: Determines the data length of serial characters ...
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... Logic 1 = Forces RTS# output to active (low) Unused Unused Logic 0 = Normal operating mode Logic 1 = Enable Local Loop-Back Mode Logic 0 = CTS/RTS flow control Disabled in 550-Mode Logic 1 = CTS/RTS flow control Enabled in 550-Mode Unused Unused MCS7710 USB-1.1 to Single Serial Port Bit[3] Bit[2] Bit[1] Out2 Out1 RTS Description ...
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... MCS7710 USB-1.1 to Single Serial Port Line Status Register: This register provides the status of the data transfer to the CPU. Register: LSR Description: Line Status Register Offset: 5 Permissions: Read Access Condition: LCR[7] =0, ACR[ Bit[7] Bit[6] Data Tx Error Empty Bit Name RHR 0 Data Available ...
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... Logic 1 = DSR# line is 0 Logic 0 = RI# line is 1 Logic 1 = RI# line is 0 Logic 0 = DCD# line is 1 Logic 1 = DCD# line is 0 Bit[5] Bit[4] Bit[3] Scratch Pad Register MCS7710 USB-1.1 to Single Serial Port Bit[2] Bit[1] Bit[0] Trailing Delta DSR Delta CTS Edge RI Bit[2] ...
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... MCS7710 USB-1.1 to Single Serial Port Divisor Latch Registers: The divisor latch registers (DLL & DLM) are used to program the baud rate divisor. This is a value between 1 and 65535 by which the input clock is divided in order to generate serial Baud Rates. After a hardware Reset, the Baud Rate used by the transmitter & ...
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... BIT-3 BIT MCS7710 BIT-1 BIT Page 15 ...
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... MCS7710 USB-1.1 to Single Serial Port Electrical Characteristics Absolute Maximum Ratings Supply Voltage Input Voltage (I/O) Storage Temperature Recommended Operating Conditions Supply Voltage Input Voltage (I/O) Ambient Operating Temperature (free air) Junction Operating Temperature Static Characteristics (Supply Pins 4.5V to 5.5V; GND = 0V; Temp = 0 to +70° C; unless otherwise specified ...
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... USB-1.1 to Single Serial Port MILLIMETERS SYMBOL MIN TYPICAL A1 0.05 A2 1.35 b 0.17 c 0.09 e 0.50 L 0.45 HD 8.80 D 7.20 HE 8.80 E 7.20 MCS7710 INCHES MAX MIN TYPICAL MAX 0.15 0.002 0.006 1.45 0.053 0.057 0.27 0.007 0.011 0.20 0.004 0.008 0.0197 0.75 0.018 0.030 9.20 0.346 0.362 6.80 0.283 ...
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... MCS7710 USB-1.1 to Single Serial Port MosChip Semiconductor Technology, LTD products are not authorized for use as critical components in life support devices or systems. Life support devices are applications that may involve potential risks of death, personal injury or severe property or environmental damages. These critical components are semiconductor products whose failure to perform can be reasonably expected to cause the failure of the life support systems or device adversely impact its effectiveness or safety ...
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... Revision 1.0 1.1 Rev. 1.1 USB-1.1 to Single Serial Port Revision History Changes Preliminary Release Revised Data Sheet MCS7710 Date 7-Nov-2002 27-Mar-2006 Page 19 ...