ltc3717-1 Linear Technology Corporation, ltc3717-1 Datasheet - Page 16

• Manufacturer Part Number: ltc3717-1
• Description: Wide Operating Range, No Rsense Step-down Controller For Ddr/qdr Memory Termination
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
LTC3717-1
Tying V
for a nominal value of 110mV with current limit occurring
at 143mV. To check if the current limit is acceptable,
assume a junction temperature of about 40 C above a
70 C ambient with
and double check the assumed T
Because the top MOSFET is on roughly the same amount
of time as the bottom MOSFET, the same Si4874 can be
used as the synchronous MOSFET.
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
C
85 C. The output capacitors are chosen for a low ESR of
16
IN
P
T
I
BOT
J
LIMIT
is chosen for an RMS current rating of about 5A at
= 70 C + (1.02W)(40 C/W) = 111 C
RNG
2 5
C
L1: SUMIDA CEP125-0R68MC-H
.
to 1.1V will set the current sense voltage range
C
( . )( .
IN
11k
470pF
ON
1 4 0 010
R3
, C
C
V
C1
0.1 F
2 5
0.01 F
511k
OUT1-2
C
R
143
– .
.
SS
ON
100pF
1 25
V
C
20k
39k
R
R4
C2
: CORNELL DUBILIER ESRE181E04B
C
mV
U
110 C
V
100k
R
(OPT)
0.1 F
( . ) ( . )( .
PG
12 1
)
U
= 1.4:
2
1
A
RUN/SS
PGOOD
V
I
SGND
I
V
V
V
( .
TH
ON
RNG
ON
FB
REF
3 7
2
LTC3717-1
J
1 4 0 010
10
A
in the MOSFET:
W
)
SENSE
SENSE
EXTV
INTV
BOOST
Figure 7. Design Example: 1.25V/ 10A at 250kHz
DRV
PGND
V
12 1
SW
BG
TG
CC
CC
CC
CC
+
–
.
A
)
U
1 02
C
0.22 F
+
CMDSH-3
B
.
C
4.7 F
C
0.1 F
1
R
VCC
F
D
F
B
W
0.013 to minimize output voltage changes due to induc-
tor ripple current and load steps. For current sinking
applications where current flows back to the input through
the top transistor, output capacitors with a similar amount
of bulk C and ESR should be placed on the input as well.
(This is typically the case, since V
another DC/DC converter.) The ripple voltage will be only:
However, a 0A to 10A load step will cause an output
change of up to:
An optional 22 F ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 7.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
it is recommended to use a multilayer board to help with
heat sinking power components.
V
EXT
V
V
M1
Si4874
M2
Si4874
OUT(RIPPLE)
OUT(STEP)
5V
D2
B320A
D1
B320A
0.68 H
L1
= I
= I
= (4A) (0.013 ) = 52mV
LOAD
37171 F07
L(MAX)
+
(ESR) = (10A) (0.013 ) = 130mV
C
22 F
6.3V
X7R
C
270 F
2V
IN
OUT1-2
2
(ESR)
+
C
180 F
4V
C
22 F
6.3V
X7R
IN
2
IN
OUT3
is derived from
V
V
1.25V
IN
OUT
10A
= 2.5V
sn37171 37171fs