ics8512061i Integrated Device Technology, ics8512061i Datasheet

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ics8512061i

Manufacturer Part Number
ics8512061i
Description
Single Channel 0.7v Differential- To-lvttl Transceiver
Manufacturer
Integrated Device Technology
Datasheet
Block Diagram
SINGLE CHANNEL 0.7V DIFFERENTIAL-
TO-LVTTL TRANSCEIVER
General Description
and HCSL signals.
Applications
Backplane Transmission
Telecommunication System
Data Communications
ATCA Clock Distribution
IDT™ / ICS™ TRANSCEIVER
DIR_SEL
HiPerClockS™
ICS
IREF
QB
IN
Pullup
Pulldown
The ICS8512061I is a transceiver which can
interchange data across multipoint data bus
structures.
The device has an LVTTL driver and one HCSL
receiver driver. It translates between LVTTL signals
1
HCSL
Interface
Features
One HCSL output pair and one LVCMOS/LVTTL output
One single-ended LVCMOS/LVTTL signal input
LVTTL I/O signal: up to 250MHz
HCSL interface pins in high impedance state when the device is
powered down
Power-up and power-down glitch-free
Additive Phase Jitter, RMS: 0.23ps (typical)
Full 3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
QA
nQA
4.40mm x 3.0mm x 0.925mm package body
Pin Assignment
ICS8512061AGI REV. B NOVEMBER 19, 2008
DIR_SEL
GND
8 Lead TSSOP
QB
IN
ICS8512061I
G Package
Top View
1
2
3
4
ICS8512061I
8
7
6
5
nQA
QA
V
IREF
DD

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ics8512061i Summary of contents

Page 1

... SINGLE CHANNEL 0.7V DIFFERENTIAL- TO-LVTTL TRANSCEIVER General Description The ICS8512061I is a transceiver which can ICS interchange data across multipoint data bus structures. HiPerClockS™ The device has an LVTTL driver and one HCSL receiver driver. It translates between LVTTL signals and HCSL signals. Applications ...

Page 2

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Table 1. Pin Descriptions Number Name 1 GND Power 2 Output QB 3 DIR_SEL Input 4 IN Input 5 IREF Input 6 V Power Output nQA, QA NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. ...

Page 3

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Table 3B. LVCMOS/LVTTL DC Characteristics, V Symbol Parameter V Input High Voltage IH V Input Low Voltage Input High Current IH DIR_SEL IN I Input Low Current IL DIR_SEL Output High Voltage NOTE 1 Output Low Voltage NOTE 1 Ω NOTE: Outputs terminated with Table 3C ...

Page 4

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Table 4B. HCSL (QA/nQA) AC Characteristics, V Parameter Symbol f Output Frequency MAX tjit Buffer Additive Phase Jitter, RMS t Propagation Delay, NOTE 1 PD Rise Rising Edge Rate; NOTE 2, 3 Edge Rate Fall Falling Edge Rate; NOTE 2, 3 Edge Rate V Ringback Voltage ...

Page 5

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Additive Phase Jitter (HCSL) The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most often the specified plot in many applications ...

Page 6

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Additive Phase Jitter (LVCMOS) The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most often the specified plot in many applications ...

Page 7

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Parameter Measurement Information 3.3V±0. 33Ω 49.9Ω HCSL 33Ω IREF GND 49.9Ω 475Ω 0V 3.3V HCSL Output Load AC Test Circuit nQA Differential Propagation Delay Rise Edge Rate +150mV 0.0V -150mV Differential Measurement Points for Rise/Fall Time IDT™ ...

Page 8

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Parameter Measurement Information, continued 140mV CROSS_DELTA Q Single-ended Measurement Points for Delta Cross Point V = 1.15V MAX 550mV CROSS_MAX V = 250mV CROSS_MIN -0.30V MIN Single-ended Measurement Points for Absolute Cross Point/Swing IDT™ / ICS™ TRANSCEIVER ...

Page 9

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Application Information Recommendations for Unused Input and Output Pins Inputs: LVCMOS Control Pins All control pins has internal pull-ups; additional resistance is not required but can be added for additional protection. A 1kΩ resistor can be used. IDT™ / ICS™ TRANSCEIVER ...

Page 10

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Recommended Termination Figure 1A is the recommended termination for applications which require the receiver and driver separate PCB. All traces should be 50Ω impedance. Figure 1A. Recommended Termination Figure 1B is the recommended termination for applications which require a point to point connection and contain the driver and receiver on the same PCB. All traces should all be 50Ω ...

Page 11

... Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8512061I is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for V NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. ...

Page 12

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER 3. Calculations and Equations. The purpose of this section is to calculate power dissipation on the IC per HCSL output pair. HCSL output driver circuit and termination are shown in Figure OUT = 17mA R REF = Ω 475 ± Figure 2. HCSL Driver Circuit and Termination HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation, use the following equations which assume a 50Ω ...

Page 13

... This section provides information on power dissipation and junction temperature for the ICS8512061I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8512061I is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for V • Power (core) ...

Page 14

... Air Flow Table for a 8 Lead TSSOP JA Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8512061I is: 294 Package Outline and Package Dimensions Package Outline - G Suffix for 8 Lead TSSOP IDT™ / ICS™ TRANSCEIVER θ ...

Page 15

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Ordering Information Table 8. Ordering Information Part/Order Number Marking 8512061AGILF 61AIL 8512061AGILFT 61AIL NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...

Page 16

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Revision History Sheet Rev Table Page Description of Change B T3C 3 Added Differential DC Characteristics Table. IDT™ / ICS™ TRANSCEIVER 16 ICS8512061AGI REV. B NOVEMBER 19, 2008 Date 11/19/08 ...

Page 17

... ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Contact Information: www.IDT.com Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc ...

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