ics87952-147 Integrated Device Technology, ics87952-147 Datasheet

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ics87952-147

Manufacturer Part Number
ics87952-147
Description
High-fanout Lvcmos-input Lvcmos-output 1 11 180-mhz Clock Generator
Manufacturer
Integrated Device Technology
Datasheet
B
VCO_SEL
G
is targeted for high performance clock applications. Along
with a fully integrated PLL, the ICS87952I-147 contains fre-
quency configurable outputs and an external feedback input
for regenerating clocks with “zero delay”.
For test and system debug purposes, the nPLL_EN input
allows the PLL to be bypassed. When HIGH, the MR/nOE
input resets the internal dividers and forces the outputs to the
high impedance state.
The low impedance LVCMOS/LVTTL outputs of the
ICS87952I-147 are designed to drive terminated transmis-
sion lines. The effective fanout of each output can be doubled
by utilizing the ability of each output to drive two series termi-
nated transmission lines.
REF_CLK
87952AYI-147
nPLL_EN
HiPerClockS™
F_SELC
MR/nOE
F_SELA
F_SELB
IC S
LOCK
ENERAL
FB_IN
D
DETECTOR
The ICS87952I-147 is a low voltage, low skew
LVCMOS/LVTTL Clock Generator and a mem-
ber of the HiPerClockS™ family of High Perfor-
mance Clock Solutions from ICS. With output
frequencies up to 180MHz, the ICS87952I-147
PHASE
IAGRAM
D
Integrated
Circuit
Systems, Inc.
ESCRIPTION
LFP
240 - 480MHz
VCO
1
0
LVCMOS / LVTTL C
÷2
www.icst.com/products/hiperclocks.html
0
1
÷4/÷6
÷4/÷2
÷2/÷4
1
P
F
• Fully integrated PLL
• Eleven LVCMOS / LVTTL outputs,
• LVCMOS / LVTTL REF_CLK input
• Output frequency range up to 180MHz at V
• VCO range: 240MHz - 480MHz
• External feedback for “zero delay” clock regeneration
• Cycle-to-cycle jitter: 100ps (maximum)
• 3.3V supply voltage
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
QA0
QA1
QA2
QA3
QA4
QB0
QB1
QB2
QB3
QC0
QC1
7Ω typical output impedance
packages
IN
EATURES
A
LOCK
SSIGNMENT
GNDO
GNDO
V
V
QC0
QC1
QB2
QB3
DDO
DDO
M
7mm x 7mm x 1.4mm package body
ULTIPLIER
25
26
27
28
29
30
31
32
24 23 22 21 20 19 18 17
1
ICS87952I-147
2
32-Lead LQFP
ICS87952I-147
Y package
3
Top View
/Z
L
4
OW
ERO
5
6
S
D
7
KEW
ELAY
8
DD
REV. B APRIL 10, 2006
= 3.3V ± 5%
, 1-
16
15
14
13
12
11
10
9
B
V
QA2
QA1
GNDO
QA0
V
V
nPLL_EN
TO
UFFER
DDO
DD
DDA
-11

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