ics8312 Integrated Device Technology, ics8312 Datasheet

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ics8312

Manufacturer Part Number
ics8312
Description
Lvcmos-input Lvcmos-output 1 12 250-mhz Clock Buffer
Manufacturer
Integrated Device Technology
Datasheet
Integrated
LOW SKEW, 1-TO-12 LVCMOS /
Circuit
Systems, Inc.
LVTTL FANOUT BUFFER
G
D
ENERAL
ESCRIPTION
The ICS8312 is a low skew, 1-to-12 LVCMOS /
ICS
LVTTL Fanout Buffer and a member of the
HiPerClockS™
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS8312 single ended
clock input accepts LVCMOS or LVTTL input lev-
els. The low impedance LVCMOS outputs are designed to
drive 50Ω series or parallel terminated transmission lines. The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply modes. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS8312 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
B
D
LOCK
IAGRAM
nD
CLK_EN
LE
CLK
OE
8312AY
IDT™ / ICS™ LOW SKEW, 1-TO-12 LVCMOS / LVTTL FANOUT BUFFER
F
EATURES
• 12 LVCMOS / LVTTL outputs
• LVCMOS / LVTTL clock input
• Maximum output frequency: 250MHz
• Output skew: 150ps (maximum)
• Operating supply modes:
Core/Output
3.3V/3.3V,
2.5V/2.5V,
1.8V/1.8V,
3.3V/2.5V,
3.3V/1.8V,
2.5V/1.8V
• 0°C to 85°C ambient operating temperature
• Lead-Free package available
• Industrial temperature information available upon request
P
IN
Q
12
Q0:Q11
http://www.icst.com/products/hiperclocks.html
1
1
ICS8312
L
S
OW
KEW
LVCMOS / LVTTL F
ANOUT
A
SSIGNMENT
32 31 30 29 28 27 26 25
GND
1
24
V
2
23
DD
CLK_EN
3
22
CLK
4
21
ICS8312
GND
5
20
OE
6
19
V
7
18
DD
GND
8
17
9 10 11 12 13 14 15 16
32-Lead LQFP
7mm x 7mm x 1.4mm body package
Y Pacakge
Top View
REV. C JUNE 14, 2004
DATA SHEET
ICS8312
, 1-
-12
TO
B
UFFER
Q4
V
DDO
Q5
GND
Q6
V
DDO
Q7
GND
ICS8312

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