ics9ums9001 Integrated Device Technology, ics9ums9001 Datasheet
ics9ums9001
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ics9ums9001 Summary of contents
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... Also runs from single 3.3V rail • 1.05V-3.3V support for differential VDDIO ICS9UMS9001 56-pin MLF 1 ICS9UMS9001 42 CLKREQ2# 41 CLKREQ3# 40 VDDCORE_3.3 39 SRC3T_LPRS 38 SRC3C_LPRS 37 SRC2T_LPRS 36 SRC2C_LPRS 35 VDDIO_SRC 34 GNDSRC ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Pin Description PIN # PIN NAME VDDREFIO_3.3 4 REF0 5 SDATA 6 SCLK 7 TEST_SEL 8 TEST_MODE 9 PCI_STOP# 10 VDDIO_PCI3.3 11 PCI0 12 PCI1 13 PCI_F2 14 GNDPCI 15 GND48 16 USB_48MHz 17 VDD48IO_3.3 18 VDD48PLL_3.3 19 VDDIO_96Mhz 20 DOT96C_LPRS 21 DOT96T_LPRS 22 GND 23 GND 24 LCD100C_LPRS 25 LCD100T_LPRS 26 VDDIO_LCD 27 VDDLCDPLL_3.3 28 CLKREQ1 IDT /ICS PC MAIN CLOCK - CK540 TYPE OUT Crystal output, nominally 14 ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Pin Description (continued) PIN # PIN NAME 29 CKLREQ0# 30 SRC0C_LPRS 31 SRC0T_LPRS 32 SRC1C_LPRS 33 SRC1T_LPRS 34 GNDSRC 35 VDDIO_SRC 36 SRC2C_LPRS 37 SRC2T_LPRS 38 SRC3C_LPRS 39 SRC3T_LPRS 40 VDDCORE_3.3 41 CLKREQ3# 42 CLKREQ2# 43 FSLB 44 CPU_STOP# 45 CPUITPC_LPRS 46 CPUITPT_LPRS 47 CPU1C_LPRS 48 CPU1T_LPRS 49 VDDIO_CPU 50 GNDCPU 51 CPU0C_LPRS 52 CPU0T_LPRS 53 VDDCPUPLL_3.3 54 CK_PWRGD#/PD 55 FSLC 56 GNDREF TM TM IDT ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Funtional Block Diagram X1 X2 CKPWRGD#/PD PCI_STOP# CPU_STOP# CLKREQ(3:0)# TESTMODE Power Groups Pin Number VDD3.3V VDDIO 1.05~3. 17 IDT /ICS PC MAIN CLOCK - CK540 OSC CPU/SRC/ PC SS-PLL LCD SS PLL Fixed EXACT 48MHz FSLC FSLB ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Table 1: CPU Frequency Select Table 1 1 CPU SRC MHz MHz B0b7 B0b6 0 0 133.33 100. Reserved 1 0 100.00 100. 200. low-threshold input.Please see V L the Input/Supply/Common Output Parameters Table for correct values. ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Absolute Maximum Ratings PARAMETER SYMBOL Maximum Supply Voltage VDDxxx_3.3 Maximum Supply Voltage VDDxxx_1.8 Maximum Supply Voltage VDDxxx_IO Maximum Input Voltage V Minimum Input Voltage V Storage Temperature Ts Input ESD protection ESD prot Electrical Characteristics - Input/Supply/Common Output Parameters PARAMETER SYMBOL ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 AC Electrical Characteristics - Input/Common Parameters PARAMETER SYMBOL Clk Stabilization T STAB Tdrive_SRC T DRSRC Tdrive_PD# T DRPD Tdrive_CPU T DRSRC Tfall_PD# T Trise_PD Electrical Characteristics - Low Power Differential Outputs PARAMETER SYMBOL Rising Edge Slew Rate t Falling Edge Slew Rate t Rise/Fall Time Variation ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Electrical Characteristics - USB48MHz PARAMETER SYMBOL Long Accuracy ppm Clock period T period Absolute min/max period T Output High Voltage V Output Low Voltage V Output High Current I Output Low Current I Rising Edge Slew Rate t Falling Edge Slew Rate t Duty Cycle Jitter, Cycle to cycle ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Electrical Characteristics - REF-14.318MHz PARAMETER SYMBOL Long Accuracy ppm Clock period T period Absolute min/max period T Output High Voltage V Output Low Voltage V Output High Current I Output Low Current I Rising Edge Slew Rate t Falling Edge Slew Rate t Duty Cycle ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 2 General I C serial interface information for the ICS9UMS9001 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the beginning byte location = N • ICS clock will acknowledge • ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Byte 0 FS Readback, SS Enable, STOP Control Register Bit Pin Name 7 FSLC - 6 FSLB 5 CPU_SS_EN Spread spectrum enable for CPU/SRC/PCI outputs 4 LCD_Enable 3 SRC3_STOP 2 SRC2_STOP 1 SRC1_STOP 0 SRC0_STOP Byte 1 LCD Quick Config and CPU Stop ControlRegister Bit Pin Name 7 CPU_ITP_STOP 6 CPU1_STOP ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Byte 5 Drive Strength Control Register Bit Pin Name 7 PCI_F2 Strength 6 PCI1 Strength 5 PCI0 Strength 4 48MHz Strength 3 REF Strength 2 IO_VOUT2 IO Output Voltage Select (Most Significant Bit) 1 IO_VOUT1 0 IO_VOUT0 IO Output Voltage Select (Least Significant Bit) Byte 6 Reserved Register Bit ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Test Clarification Table Comments Power-up w/ TEST_SEL = 1 to enter test mode Cycle power to disable test mode TEST_MODE -->low Vth input TEST_MODE is a real time input If TEST_SEL HW pin is 0 during power-up, test mode can be invoked through B9b3. If test mode is invoked by B9b3, only B9b4 is used to select HI-Z or REF/N FSLB/TEST_Mode pin is not used ...
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... E Top View D Chamfer 4x 0.6 x 0.6 max OPTIONAL DIMENSIONS SYMBOL MIN 0.25 Reference b 0.18 e 0.50 BASIC Ordering Information ICS9UMS9001yKLF-T Example: ICS XXXX IDT /ICS PC MAIN CLOCK - CK540 Seating Plane A1 A3 Anvil Singulation E2 OR Sawn Singulation A 0.08 C THERMALLY ENHANCED, VERY THIN, FINE PITCH QUAD FLAT / NO LEAD PLASTIC PACKAGE MAX ...
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... ICS9UMS9001 PC MAIN CLOCK - CK540 Revision History Rev. Issue Date Description 1. Removed CK505 reference is Device ID byte of SMBus 2. Moved SMBus AFTER electrical characteristics 3. Made Data sheet Rev A device. A 8/28/2008 4. Move to Final TM TM IDT /ICS PC MAIN CLOCK - CK540 Advance Information 15 Page # 1247A—08/28/08 ...