mc100ep196-d ON Semiconductor, mc100ep196-d Datasheet - Page 12

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mc100ep196-d

Manufacturer Part Number
mc100ep196-d
Description
3.3v Ecl Programmable Delay Chip With Ftune
Manufacturer
ON Semiconductor
Datasheet
Using the FTUNE Analog Input
to add more delay in a tunable gate to enhance the 10 ps
resolution capabilities of the fully digital EP196. The level
of resolution obtained is dependent on the voltage applied to
the FTUNE pin.
must be capable of adjusting the additional delay finer than
the 10 ps digital resolution (See Logic Diagram). This
requirement is easily achieved because a 60 ps additional
delay can be obtained over the entire FTUNE voltage range
(See Figure 5). This extra analog range ensures that the
The analog FTUNE pin on the EP196 device is intended
To provide this further level of resolution, the FTUNE pin
−10
90
80
70
60
50
40
30
20
10
0
V
−3.3 −2.97 −2.64 −2.31 −1.98 −1.65 −1.32 −0.99 −0.66 −0.33
EE
V
V
CC
EE
Figure 5. Typical EP196 Delay versus FTUNE Voltage
= −3.3 V
= 0 V
IN
IN
Q
Q
Figure 4. AC Reference Measurement
t
PLH
http://onsemi.com
FTUNE VOLTAGE (V)
12
FTUNE pin will be capable even under worst case
conditions of covering a digital resolution. Typically, the
analog input will be driven by an external DAC to provide
a digital control with very fine analog output steps. The final
resolution of the device will be dependent on the width of the
DAC chosen.
input, Figure 5 should be used. There are numerous voltage
ranges which can be used to cover a given delay range; users
are given the flexibility to determine which one best fits their
designs.
To determine the voltage range necessary for the FTUNE
t
PHL
25°C
V
V
INPP
OUTPP
−40°C
= V
= V
IH
(D) − V
OH
85°C
(Q) − V
IL
(D)
V
0
OL
CC
(Q)

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