mc100ep08mnr4g ON Semiconductor, mc100ep08mnr4g Datasheet - Page 2

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mc100ep08mnr4g

Manufacturer Part Number
mc100ep08mnr4g
Description
Differential 2-input Xor/xnor
Manufacturer
ON Semiconductor
Datasheet
D0
D0
D1
D1
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
1
2
3
4
Table 3. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Characteristics
http://onsemi.com
Oxygen Index: 28 to 34
8
7
6
5
Charged Device Model
Human Body Model
V
Q
Q
V
CC
Machine Model
EE
2
TSSOP−8
SOIC−8
* Pins will default LOW when left open.
** Pins will default to 0.666% of V
Table 1. PIN DESCRIPTION
DFN8
Table 2. TRUTH TABLE
V
EP
PIN
D0, D1, D0, D1
Q, Q
V
D0*
L
L
H
H
EE
CC
D1*
L
H
L
H
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
135 Devices
D0**
H
H
L
L
37.5 kW
> 200 V
> 4 kV
> 2 kV
Value
75 kW
ECL Data Inputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect
to the most negative supply (GND) or
leave unconnected, floating open.
ECL Data Outputs
FUNCTION
Pb−Free Pkg
D1**
H
L
H
L
Level 1
Level 3
Level 1
CC
when left open.
Q
L
H
H
L
Q
H
L
L
H

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