74lvt32374 NXP Semiconductors, 74lvt32374 Datasheet
74lvt32374
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74lvt32374 Summary of contents
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... DATA SHEET 74LVT32374 3.3 V 32-bit edge-triggered D-type flip-flop; 3-state Product specification Supersedes data of 2002 Mar 20 INTEGRATED CIRCUITS 2004 Oct 15 ...
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... Oct 15 DESCRIPTION The 74LVT32374 is a high-performance BICMOS product designed for V The 74LVT32374 is a 32-bit edge-triggered D-type flip-flop featuring non-inverting 3-state outputs. The device can be used as four 8-bit flip-flops, or two 16-bit flip-flops or one 32-bit flip-flop. On the positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels set-up at the D inputs ...
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... PINS PACKAGE 96 LFBGA96 DESCRIPTION data input clock input flip-flop output ground (0 V) output enable input (active LOW) supply voltage 3 Product specification 74LVT32374 INTERNAL REGISTER PACKAGE MATERIAL CODE plastic ...
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... Fig.2 Logic symbol. 4 MNA497 GND V CC GND GND V CC GND 4CP GND V CC GND GND V CC GND 4OE other channels other channels MNA498 Product specification 74LVT32374 ...
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... The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 70 C the value of P tot 2004 Oct 15 handbook, halfpage 27 output 27 MNA676 CONDITIONS note 1 current duty cycle outputs enabled note 2 derates linearly with 1.8 mW/K. 5 Product specification 74LVT32374 V CC data to internal circuit input Fig.4 Bus hold circuit. MIN. MAX. 2.7 +3.6 0 5.5 2.0 0 ...
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... The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2004 Oct 15 CONDITIONS V < note 2 output in OFF or HIGH state; note 2 output in LOW state output in HIGH state 6 Product specification 74LVT32374 MIN. TYP. MAX. UNIT 0.5 +4 0.5 +7.0 V ...
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... GND note one input at V 0.6 V; other CC inputs at GND note 3.3 V and amb between 0 V and 1.2 V with a transition time ms. From GND Product specification 74LVT32374 MIN. TYP. V (V) CC 2.7 0.85 3.0 2.0 2.3 3.0 0.4 ; 3.6 0.1 CC 3.6 0 3.6 0.4 3.6 0.1 3.6 ...
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... Figs 7 and 8 2.7 3.0 to 3.6 see Figs 7 and 8 2.7 3.0 to 3.6 see Figs 7 and 8 2.7 3.0 to 3.6 see Figs 7 and 8 2.7 3.0 to 3.6 see Fig.6 2.7 3.0 to 3.6 see Fig.6 2.7 3.0 to 3.6 see Fig.6 2.7 3.0 to 3.6 see Fig.6 2.7 3.0 to 3.6 see Fig.6 2.7 3.0 to 3.6 see Fig.6 2.7 3.0 to 3.6 see Fig.5 3.0 to 3.6 = 3.3 V and amb 8 Product specification 74LVT32374 (1) MIN. TYP. MAX. 6.2 1.5 3.0 5.3 5.1 1.5 3.0 4.9 6.9 1.5 3.5 5.6 6.0 1.5 3.2 4.9 5.7 1.5 3.5 5.4 1.5 3.2 5.1 1.5 3.2 5.0 2.0 2.0 0.7 2.0 2.0 0.7 0.1 ...
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... Oct 15 1/f max 2 PHL propagation delays, the clock pulse width and the maximum clock pulse suH Product specification 74LVT32374 PLH MNA677 suL t WL MNA678 ) to inputs (nCP). n ...
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... Fig.8 3-state output enable time to LOW level and output disable time from LOW level. 2004 Oct 15 2 PZH 2 PZH Product specification 74LVT32374 PHZ V OH 0.3 V MNA679 PHZ V OL 0.3 V MNA680 ...
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... Fig.9 Load circuitry for switching times 500 ns 2.5 ns 2.5 ns Fig.10 Input pulse definition. 11 Product specification 74LVT32374 6 V open GND MNA681 of the pulse generator 10% MNA682 t f ...
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... 1 1 scale 5.6 13.6 0 0.15 5.4 13.4 REFERENCES JEDEC JEITA 12 Product specification 74LVT32374 detail 0.1 0.1 0.2 EUROPEAN PROJECTION SOT536-1 ISSUE DATE 00-03-04 03-02-05 ...
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... Product specification 74LVT32374 DEFINITION These products are not Philips Semiconductors ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited ...