74lvq00 STMicroelectronics, 74lvq00 Datasheet - Page 4

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74lvq00

Manufacturer Part Number
74lvq00
Description
Low Voltage Cmos Quad 2-input Nand Gate
Manufacturer
STMicroelectronics
Datasheet

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74LVQ00
Table 8: AC Electrical Characteristics (C
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
Table 9: Capacitive Characteristics
1) C
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
Figure 3: Test Circuit
C
R
R
4/11
t
Symbol
Symbol
L
L
T
PLH
t
t
= 50pF or equivalent (includes jig and probe capacitance)
= 500
= Z
OSLH
OSHL
C
PD
C
PD
IN
OUT
t
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PHL
of pulse generator (typically 50 )
or equivalent
Propagation Delay
Time
Output To Output
Skew Time (note1,
2)
Input Capacitance
Power Dissipation
Capacitance (note
1)
Parameter
Parameter
0.3V
3.3
3.3
V
V
2.7
2.7
3.3
3.3
(V)
(V)
CC
CC
(*)
(*)
Test Condition
Test Condition
OSLH
f
IN
= |t
= 10MHz
PLHm
L
= 50 pF, R
- t
PLHn
|, t
OSHL
Min.
Min.
L
.
= 500
= |t
T
T
A
A
PHLm
Typ.
Typ.
= 25°C
= 25°C
6.0
5.5
0.5
0.5
24
4
- t
, Input t
PHLn
Max.
Max.
11.0
8.0
1.0
1.0
|)
r
Value
Value
CC(opr)
-40 to 85°C
Min.
-40 to 85°C
Min.
= t
f
= 3ns)
= C
Max.
Max.
12.0
9.0
1.0
1.0
PD
x V
CC
-55 to 125°C
-55 to 125°C
Min.
Min.
x f
IN
+ I
Max.
Max.
14.0
10.0
CC
1.0
1.0
/4 (per gate)
Unit
Unit
pF
pF
ns
ns

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