at94k10al ATMEL Corporation, at94k10al Datasheet - Page 145

• Manufacturer Part Number: at94k10al
• Description: At94k05al 5k - 40k Gates Of At40k Fpga With 8-bit Microcontroller, Up To 36k Bytes Of Sram And On-chip Jtag Ice
• Manufacturer: ATMEL Corporation

4.30.1
4.30.1.1
1138I–FPSLI–1/08
2-wire Serial Modes
Master Transmitter Mode
The 2-wire Serial Interface can operate in four different modes:
Data transfer in each mode of operation is shown in
contain the following abbreviations:
S: START condition
R: Read bit (High level at SDA)
W: Write bit (Low level at SDA)
A: Acknowledge bit (Low level at SDA)
A: Not acknowledge bit (High level at SDA)
Data: 8-bit data byte
P: STOP condition
In
set. The numbers in the circles show the status code held in TWSR. At these points, an interrupt
routine must be executed to continue or complete the 2-wire Serial Transfer. The 2-wire Serial
Transfer is suspended until the 2-wire Serial Interrupt flag is cleared by software.
The 2-wire Serial Interrupt flag is not automatically cleared by the hardware when executing the
interrupt routine. Also note that the 2-wire Serial Interface starts execution as soon as this bit is
cleared, so that all access to TWAR, TWDR and TWSR must have been completed before clear-
ing this flag.
When the 2-wire Serial Interrupt flag is set, the status code in TWSR is used to determine the
appropriate software action. For each status code, the required software action and details of
the following serial transfer are given in
In the Master Transmitter mode, a number of data bytes are transmitter to a Slave Receiver, see
Figure
as shown in
Table 4-26.
TWEN must be set to enable the 2-wire Serial Interface, TWSTA and TWSTO must be cleared.
The Master Transmitter mode may now be entered by setting the TWSTA bit. The 2-wire Serial
Logic will now test the 2-wire Serial Bus and generate a START condition as soon as the bus
becomes free. When a START condition is transmitted, the 2-wire Serial Interrupt flag (TWINT)
is set by the hardware, and the status code in TWSR will be $08. TWDR must then be loaded
with the Slave address and the data direction bit (SLA+W). The TWINT flag must then be
TWCR
value
• Master Transmitter
• Master Receiver
• Slave Receiver
• Slave Transmitter
Figure 4-48
4-48. Before the Master Transmitter mode can be entered, the TWCR must be initialized
Table
TWCR: Master Transmitter Mode Initialization
to
TWINT
0
Figure
4-26.
4-51, circles are used to indicate that the 2-wire Serial Interrupt flag is
TWEA
X
TWSTA
0
Table 4-29
TWSTO
0
AT94KAL Series FPSLIC
to
Figure 4-48
Table
TWWC
0
4-33.
TWEN
1
to
Figure
-
0
4-51. These figures
TWIE
X
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