lan8710 Standard Microsystems Corp., lan8710 Datasheet

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... Cable Modems/Routers DSL Modems/Routers Digital Video Recorders IP and Video Phones Wireless Access Points Digital Televisions Digital Media Adaptors/Servers Gaming Consoles POE Applications SMSC LAN8710/LAN8710i LAN8710/LAN8710i MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX ® and flexPWR Technology in a Small Footprint Key Benefits High-Performance 10/100 Ethernet Transceiver — ...

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... LAN8710Ai-EZK FOR 32-PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (-40 TO +85°C TEMP) LAN8710A-EZK-TR FOR 32-PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (0 TO +85°C TEMP) LAN8710Ai-EZK-TR FOR 32-PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (-40 TO +85°C TEMP) 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © ...

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... Transmit Data Across the MII/RMII Interface 4.4.2 Manchester Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4.3 10M Transmit Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.5 10Base-T Receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.5.1 10M Receive Input and Squelch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.5.2 Manchester Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.5.3 10M Receive Data Across the MII/RMII Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.5.4 Jabber Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.6 MAC Interface 4.6.1 MII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.6.2 RMII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.6.3 MII vs. RMII Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.7 Auto-negotiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 3 DATASHEET Revision 1.0 (04-15-09) ...

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... Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 7.1.2 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 7.1.3 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 7.1.4 DC Characteristics - Input and Output Buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Chapter 8 Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.1 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.1.1 MII Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.1.2 Power Supply Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 4 DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet 8.1.3 Twisted-Pair Interface Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 8.2 Magnetics Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Chapter 9 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 5 DATASHEET Revision 1.0 (04-15-09) ...

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... List of Figures Figure 1.1 LAN8710/LAN8710i System Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 1.2 LAN8710/LAN8710i Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 2.1 LAN8710/LAN8710i 32-QFN Pin Assignments (TOP VIEW Figure 4.1 100Base-TX Data Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 4.2 Receive Data Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 4.3 Relationship Between Received Data and Specific MII Signals . . . . . . . . . . . . . . . . . . . . . . 24 Figure 4.4 Direct Cable Connection vs. Cross-over Cable Connection . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 4 ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet List of Tables Table 2.1 LAN8710/LAN8710i 32-PIN QFN Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 3.1 Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 3.2 MII/RMII Signals 32-QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 3.3 LED Signals 32-QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 3.4 Management Signals 32-QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 3.5 General Signals 32-QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 3.6 10/100 Line Interface Signals 32-QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 3 ...

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... Table 6.8 10M RMII Receive Timing Values (50MHz REF_CLK IN Table 6.9 10M RMII Transmit Timing Values (50MHz REF_CLK IN Table 6.10 RMII CLKIN (REF_CLK) Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 6.11 Reset Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 6.12 LAN8710/LAN8710i Crystal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Table 7.1 Maximum Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 7.2 ESD and LATCH-UP Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 7.3 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Table 7 ...

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... Figure 1. available in both extended commercial and industrial temperature operating versions. The LAN8710/LAN8710i interfaces to the MAC layer using a variable voltage digital interface via the standard MII (IEEE 802.3u). Support for RMII makes a reduced pin-count interface available. The digital interface pins are tolerant to 3.6V. ...

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... The LAN8710 will begin normal operation following reset, and no register access is required. The initial configuration may be selected with configuration pins as described in register-selectable configuration options may be used to further define the functionality of the transceiver. For example, the device can be set to 10BASE-T only. The LAN8710 supports both IEEE 802.3-2005 compliant and vendor-specific register functions. Revision 1.0 (04-15-09) ...

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... Rx TXER Logic TXCLK RXD[0:3] RXDV Receive Section RXER RXCLK 10M Rx CRS Logic COL/CRS_DV MDC MDIO Figure 1.2 LAN8710/LAN8710i Architectural Overview SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Auto- 10M Tx 10M Logic Transmitter Transmit Section 100M Tx 100M Logic Transmitter DSP System: Analog-to- ...

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... Chapter 2 Pin Configuration 2.1 Package Pin-out Diagram and Signal Table VDD2A LED2/nINTSEL LED1/REGOFF XTAL2 XTAL1/CLKIN VDDCR RXCLK/PHYAD1 RXD3/PHYAD2 Figure 2.1 LAN8710/LAN8710i 32-QFN Pin Assignments (TOP VIEW) Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 1 24 TXD2 2 23 TXD1 3 22 TXD0 SMSC LAN8710/LAN8710i ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet Table 2.1 LAN8710/LAN8710i 32-PIN QFN Pinout PIN NO. PIN NAME 1 VDD2A 2 LED2/nINTSEL 3 LED1/REGOFF 4 XTAL2 5 XTAL1/CLKIN 6 VDDCR 7 RXCLK//PHYAD1 8 RXD3/PHYAD2 9 RXD2/RMIISEL 10 RXD1/MODE1 11 RXD0/MODE0 12 VDDIO 13 RXER/RXD4/PHYAD0 14 CRS 15 COL/CRS_DV/MODE2 16 MDIO SMSC LAN8710/LAN8710i ® Technology in a Small Footprint PIN NO ...

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... Table 3.2 MII/RMII Signals 32-QFN DESCRIPTION Transmit Data 0: The MAC transmits data to the transceiver using this signal in all modes. Transmit Data 1: The MAC transmits data to the transceiver using this signal in all modes 14 DATASHEET ® Technology in a Small Footprint Datasheet . LAN8710/LAN8710i SMSC LAN8710/LAN8710i ...

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... IOPD RMIISEL RXD3/ 8 IOPD PHYAD2 SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION Transmit Data 2: The MAC transmits data to the transceiver using this signal in MII Mode. This signal should be grounded in RMII Mode. Transmit Data 3: The MAC transmits data to the transceiver using this signal in MII Mode ...

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... When the regulator is disabled, external 1.2V must be supplied to VDDCR. When LED1/REGOFF is pulled high to VDD2A with an external resistor, the internal regulator is disabled. When LED1/REGOFF is floating or pulled low, the internal regulator is enabled (default). 16 DATASHEET ® Technology in a Small Footprint Datasheet 4.9, this pin is sampled during the SMSC LAN8710/LAN8710i ...

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... Table 3.6 10/100 Line Interface Signals 32-QFN SIGNAL 32-QFN NAME PIN # TYPE TXP 29 AIO SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION LED2 – Link Speed LED Indication. See Section 5.3.7 for a description of LED modes. nINTSEL: On power-up or external reset, the mode of the nINT/TXER/TXD4 pin is selected ...

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... Analog Port Power to Channel 1. +3.3V Analog Port Power to Channel 2 and to internal regulator. The flag must be connected to the ground plane with a via array under the exposed flag. This is the ground connection for the IC. 18 DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i ...

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... For RMII, the MAC controller drives the transmit data onto the TXD bus and asserts TXEN to indicate valid data. The data is latched by the transceiver’s RMII block on the rising edge of REF_CLK. The data is in the form of 2-bit wide 50MHz data. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint ...

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... Sent for rising TXEN Sent for rising TXEN Sent for falling TXEN 20 DATASHEET ® Technology in a Small Footprint Datasheet Table 4.1. Each 4-bit data-nibble TRANSMITTER INTERPRETATION 0 0000 DATA 1 0001 2 0010 3 0011 4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 A 1010 B 1011 C 1100 D 1101 E 1110 F 1111 SMSC LAN8710/LAN8710i ...

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... T and 100Base-TX signals pass through the same transformer so that common “magnetics” can be used for both. The transmitter drives into the 100Ω impedance of the CAT-5 cable. Cable termination and impedance matching require external components. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 4 ...

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... E ncoder onverter M agnetics R J45 Figure 4.2 Receive Data Path Figure 4.2. Detailed descriptions are given below. 22 DATASHEET ® Technology in a Small Footprint Datasheet S cram bler 25M bits and river C A T-5 M LT-3 SMSC LAN8710/LAN8710i ...

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... RXD is aligned to nibble boundaries. It remains active until either the /T/R/ delimiter is recognized or link test indicates failure or SIGDET becomes false. RXDV is asserted when the first nibble of translated /J/K/ is ready for transfer over the Media Independent Interface (MII mode). SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 23 DATASHEET Revision 1 ...

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... The data is in the form of 4-bit wide 2.5MHz data. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR data data data data data data data data 24 DATASHEET ® Technology in a Small Footprint Datasheet T R Idle SMSC LAN8710/LAN8710i ...

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... Section 5.3.2, "Collision Detect," on page For RMII, TXD[1:0] shall transition synchronously with respect to REF_CLK. When TXEN is asserted, TXD[1:0] are accepted for transmission by the LAN8710/LAN8710i. TXD[1:0] shall be “00” to indicate idle when TXEN is deasserted. Values of TXD[1:0] other than “00” when TXEN is deasserted are reserved for out-of-band signalling (to be defined). Values other than “ ...

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... RXDV high. The transceiver drives RXER high when a receive error is detected. 4.6.2 RMII The SMSC LAN8710 supports the low pin count Reduced Media Independent Interface (RMII) intended for use between Ethernet transceivers and Switch ASICs. Under IEEE 802.3, an MII Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR ...

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... REF_CLK, the data on RXD[1:0] shall be “00” until proper receive signal decoding takes place. 4.6.3 MII vs. RMII Configuration The LAN8710/LAN8710i must be configured to support the MII or RMII bus for connectivity to the MAC. This configuration is done through the RXD2/RMIISEL pin. MII or RMII mode selection is configured based on the strapping of the RXD2/RMIISEL pin as described in Section 5 ...

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... The RMII REF_CLK is a continuous clock that provides the timing reference for CRS_DV, RXD[1:0], TXEN, TXD[1:0] and RXER. The LAN8710 uses REF_CLK as the network clock such that no buffering is required on the transmit data path. However, on the receive data path, the receiver recovers the clock from the incoming data stream, and the LAN8710 uses elasticity buffering to accommodate for differences between the recovered clock and the local REF_CLK ...

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... Auto-negotiation will also re-start if not all of the required FLP bursts are received. The capabilities advertised during auto-negotiation by the transceiver are initially determined by the logic levels latched on the MODE[2:0] bus after reset completes. This bus can also be used to disable auto-negotiation on power-up. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 29 DATASHEET Revision 1 ...

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... Parallel Detection If the LAN8710/LAN8710i is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs are detected able to determine the speed of the link based on either 100M MLT-3 symbols or 10M Normal Link Pulses. In this case the link is presumed to be Half Duplex per the IEEE standard. ...

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... LED1/REGOFF pin is floating. During VDDIO and VDDA power-on, if the LED1/REGOFF pin is sampled below V +1.2V regulator will turn on and operate with power from the VDD2A pin. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint , then the internal regulator is disabled, and the system must ...

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... To set REGOFF without LEDs, pull-up the pin with an external resistor to VDDIO to disable the regulator. See Figure 4.6. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Figure 4.5. nINTSEL = 0 LED output = active high 10K Figure 4.5 nINTSEL Strapping on LED2 32 DATASHEET ® Technology in a Small Footprint Datasheet LED2/nINTSEL ~270 ohms SMSC LAN8710/LAN8710i ...

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... Variable Voltage I/O The Digital I/O pins on the LAN8710/LAN8710i are variable voltage to take advantage of low power savings from shrinking technologies. These pins can operate from a low I/O voltage of +1.8V-10 +3.3V+10%. The I/O voltage the System Designer applies on VDDIO needs to maintain its value with a tolerance of ± 10%. Varying the voltage up or down, after the transceiver has completed power- on reset can cause errors in the transceiver operation ...

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... Data To Phy Write Cycle PHY Address Register Address Data To Phy 34 DATASHEET ® Technology in a Small Footprint Datasheet Section 6.1, "Serial Management ... ... D15 D14 D1 D0 Turn Data Around Data From Phy ... ... D15 D14 D1 D0 Turn Data Around SMSC LAN8710/LAN8710i ...

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Chapter 5 SMI Register Mapping Reset Loopback Speed A/N Select Enable 100Base 100Base 100Base 10Base- T -T4 -TX -TX Full Half Full Duplex Duplex Duplex PHY ID ...

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Table 5.5 Auto-Negotiation Advertisement: Register 4 (Extended Next Reserved Remote Reserved Page Fault Table 5.6 Auto-Negotiation Link Partner Base Page Ability Register: Register 5 (Extended Next Acknowledge Remote Reserved Page Fault ...

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Table 5.10 Mode Control/ Status Register 17: Vendor-Specific RSVD EDPWRDOWN RSVD LOWSQEN RSVD = Reserved Reserved MIIMODE Table 5.14 Symbol ...

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Table 5.15 Special Control/Status Indications Register 27: Vendor-Specific AMDIXCTRL Reserved CH_SELECT Table 5.16 Special Internal Testability Control Register 28: Vendor-Specific Reserved ...

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... The mode key is as follows Read/write Self clearing Write only Read only Latch high, clear on read of register Latch low, clear on read of register, NASR = Not Affected by Software Reset X = Either SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 5.20 SMI Register Mapping DESCRIPTION 39 DATASHEET Group Basic ...

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... Table 5.22 Register 1 - Basic Status DESCRIPTION 40 DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT RW Set by MODE[2:0] bus RW Set by MODE[2:0] bus RW Set by MODE[2:0] bus MODE DEFAULT SMSC LAN8710/LAN8710i ...

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... ADDRESS NAME 4.15 Next Page 4.14 Reserved 4.13 Remote Fault 4.12 Reserved 4.11:10 Pause Operation SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION Table 5.23 Register 2 - PHY Identifier 1 DESCRIPTION Assigned to the 3rd through 18th bits of the Organizationally Unique Identifier (OUI), respectively. OUI=00800Fh Table 5.24 Register 3 - PHY Identifier 2 DESCRIPTION th ...

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... IEEE 802.3 42 DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT Set by MODE[2:0] bus Set by MODE[2:0] bus RW Set by MODE[2:0] bus RW 00001 MODE DEFAULT 00001 SMSC LAN8710/LAN8710i ...

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... LOWSQEN 17.10 MDPREBP 17.9 FARLOOPBACK 17.8:7 Reserved SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION 1 = fault detected by parallel detection logic fault detected by parallel detection logic 1 = link partner has next page ability 0 = link partner does not have next page ability 1 = local device has next page ability ...

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... It does not increment in 10Base-T mode. 44 DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT MODE DEFAULT RW 0 RW, X NASR RW, 000000 NASR Section RW, XXX for NASR RW, PHYAD NASR MODE DEFAULT RO 0 SMSC LAN8710/LAN8710i ...

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... INT7 29.6 INT6 29.5 INT5 29.4 INT4 29.3 INT3 29.2 INT2 SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION HP Auto-MDIX control 0 - Auto-MDIX enable 1 - Auto-MDIX disabled (use 27.13 to control channel) Reserved Manual Channel Select 0 - MDI -TX transmits RX receives 1 - MDIX -TX receives RX transmits Write as 0. Ignore on read. Disable the SQE (Signal Quality Error) test (Heartbeat SQE test is enabled ...

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... Full-duplex Write as 0; ignore on Read 0 = enable data scrambling 1 = disable data scrambling, 46 DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT RO RO MODE DEFAULT MODE DEFAULT XXX SMSC LAN8710/LAN8710i ...

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... It generates an active low asynchronous interrupt signal on the nINT output whenever certain events are detected as setup by the Interrupt Mask Register 30. The Interrupt system on the SMSC The LAN8710 has two modes, a Primary Interrupt mode and an Alternative Interrupt mode. Both systems will assert the nINT pin low when the corresponding mask bit is set, the difference is how they de-assert the output interrupt signal nINT ...

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... Miscellaneous Functions 5.3.1 Carrier Sense The carrier sense is output on CRS. CRS is a signal defined by the MII specification in the IEEE 802.3u standard. The LAN8710 asserts CRS based only on receive activity whenever the transceiver is either Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR EVENT TO ...

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... The user can disable this pulse by setting bit 11 in register 27. 5.3.3 Isolate Mode The LAN8710 data paths may be electrically isolated from the MII by setting register 0, bit logic one. In isolation mode, the transceiver does not respond to the TXD, TXEN and TXER inputs, but does respond to management transactions. ...

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... Section 4.10 and Section The LED1 output is driven active whenever the LAN8710 detects a valid link, and blinks when CRS is active (high) indicating activity. The LED2 output is driven active when the operating speed is 100Mbit/s. This LED will go inactive when the operating speed is 10Mbit/s or during line isolation (register 31 bit 5). ...

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... MAC interface are isolated. Far-end system TXD 10/100 X Ethernet RXD MAC X Digital Ethernet Transceiver Figure 5.2 Far Loopback Block Diagram SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Figure 5.1.The near-end loopback mode is enabled Analog SMSC TX XFMR ...

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... Special Modes register (bits18.[4:0]). The PHYAD[2:0] hardware configuration pins are multiplexed with other signals as shown in Table 5.39. The LAN8710 may be configured to disregard the PHY address in SMI access write by setting the register bit 17.3 (PHYADBP). Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Figure 5 ...

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... Table 5.21, the configuration of the 10/100 digital block is controlled by the register bit values, and the MODE[2:0] pins have no affect. The LAN8710 mode may be configured using hardware configuration as summarized in The user may configure the transceiver mode by writing the SMI registers. MODE[2:0] MODE DEFINITIONS 000 10Base-T Half Duplex ...

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... RXD2/RMIISEL pin. The mode is then configured by the register bit value. When a soft reset occurs (bit 0.15) as described in 18.14, and the RXD2/RMIISEL pin has no affect. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Table 5.21, the MII or RMII mode selection is controlled by the register bit 54 DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i ...

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... Data In - MDIO PARAMETER DESCRIPTION T1.1 MDC minimum cycle time T1.2 MDC to MDIO (Read from PHY) delay T1.3 MDIO (Write to PHY) to MDC setup T1.4 MDIO (Write to PHY) to MDC hold SMSC LAN8710/LAN8710i ® Technology in a Small Footprint T 1.1 T 1.2 Valid Data (Read from PHY) T 1.3 1.4 Valid Data (Write to PHY) Figure 6 ...

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... Receive signals setup to RXCLK rising T2.2 Receive signals hold from RXCLK rising RXCLK frequency RXCLK Duty-Cycle Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR T 2.1 2.2 Valid Data MIN TYP DATASHEET ® Technology in a Small Footprint Datasheet MAX UNITS NOTES ns ns MHz % SMSC LAN8710/LAN8710i ...

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... Figure 6.3 100M MII Transmit Timing Diagram Table 6.3 100M MII Transmit Timing Values PARAMETER DESCRIPTION T3.1 Transmit signals required setup to TXCLK rising Transmit signals required hold after TXCLK rising TXCLK frequency TXCLK Duty-Cycle SMSC LAN8710/LAN8710i ® Technology in a Small Footprint T 3.1 Valid Data MIN TYP MAX 12 0 ...

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... T4.2 Receive signals hold from RXCLK rising RXCLK frequency RXCLK Duty-Cycle Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR T T 4.1 4.2 Valid Data MIN TYP DATASHEET ® Technology in a Small Footprint Datasheet MAX UNITS NOTES ns ns MHz % SMSC LAN8710/LAN8710i ...

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... Figure 6.5 10M MII Transmit Timing Diagrams Table 6.5 10M MII Transmit Timing Values PARAMETER DESCRIPTION T5.1 Transmit signals required setup to TXCLK rising Transmit signals required hold after TXCLK rising TXCLK frequency TXCLK Duty-Cycle SMSC LAN8710/LAN8710i ® Technology in a Small Footprint T 5.1 Valid Data MIN TYP MAX ...

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... DESCRIPTION T6.1 Output delay from rising edge of CLKIN to receive signals output valid CLKIN frequency Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR T 6.1 Valid Data MIN TYP MAX DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES ns MHz SMSC LAN8710/LAN8710i ...

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... Figure 6.7 100M RMII Transmit Timing Diagram (50MHz REF_CLK IN) Table 6.7 100M RMII Transmit Timing Values (50MHz REF_CLK IN) PARAMETER DESCRIPTION T8.1 Transmit signals required setup to rising edge of CLKIN T8.2 Transmit signals required hold after rising edge of CLKIN CLKIN frequency SMSC LAN8710/LAN8710i ® Technology in a Small Footprint T T 8.1 8.2 Valid Data MIN TYP MAX ...

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... DESCRIPTION T9.1 Output delay from rising edge of CLKIN to receive signals output valid CLKIN frequency Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR T 9.1 Valid Data MIN TYP MAX DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES ns MHz SMSC LAN8710/LAN8710i ...

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... Table 6.9 10M RMII Transmit Timing Values (50MHz REF_CLK IN) PARAMETER DESCRIPTION T10.1 Transmit signals required setup to rising edge of CLKIN T10.2 Transmit signals required hold after rising edge of CLKIN CLKIN frequency SMSC LAN8710/LAN8710i ® Technology in a Small Footprint T T 10.1 10.2 Valid Data MIN TYP ...

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... Table 6.11 Reset Timing Values MIN TYP MAX 100 200 10 20 800 64 DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES MHz ppm 60 % psec p-p – not RMS UNITS NOTES clock cycles for 25 MHz clock or 40 clock cycles for 50MHz clock SMSC LAN8710/LAN8710i ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet 6.6 Clock Circuit LAN8710/LAN8710i can accept either a 25MHz crystal or a 25MHz single-ended clock oscillator (±50ppm) input. If the single-ended clock oscillator method is implemented, XTAL2 should be left unconnected and XTAL1/CLKIN should be driven with a nominal 0-3.3V clock signal. See for the recommended crystal specifications. ...

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... Technology in a Small Footprint Datasheet UNITS COMMENT V V Table 7.5, “MII Bus Interface Signals,” on page 69 V °C/W °C Extended commercial temperature components Industrial temperature components UNITS COMMENTS kV Device kV 3rd party system test kV 3rd party system test mA SMSC LAN8710/LAN8710i ...

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... HBM testing verifies the ability to withstand the ESD strikes like those that occur during handling and manufacturing, and is done without power applied to the IC. To pass the test, the device must have no change in operation or performance due to the event. All pins on the LAN8710 provide +/-5kV HBM protection. ...

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... POWER POWER PINS(MA) PIN(MA) Max 27.7 20.2 25.5 18 Min 22.7 17.5 Max 10.2 12.9 9.4 11.4 Min 9.2 10.9 Max 4.5 3 4.3 1.4 Min 3.9 1.3 Max 0.4 2.6 0.3 1.2 Min 0.3 1.1 68 DATASHEET ® Technology in a Small Footprint Datasheet Section 5.3.5 for a description VDDIO TOTAL TOTAL POWER CURRENT POWER PIN(MA) (MA) (MW) 5.2 53.1 175.2 4.3 47.8 157.7 2.4 42.6 100.2 Note 7.1 0.98 24.1 79.5 0.4 21.2 70 0.3 20.4 44 Note 7.1 0.3 7.8 25. 0.2 5.9 19.5 0 5.2 15.9 Note 7.1 0.3 3.3 10.9 0.2 1.7 5.6 0 1.4 2.4 Note 7.1 SMSC LAN8710/LAN8710i ...

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... TXEN 0.63 * VDDIO TXCLK RXD0/MODE0 RXD1/MODE1 RXD2/RMIISEL RXD3/PHYAD2 RXER/RXD4/PHYAD0 RXDV RXCLK/PHYAD1 CRS COL/CRS_DV/MODE2 MDC 0.63 * VDDIO MDIO 0.63 * VDDIO nINT/TXER/TXD4 0.63 * VDDIO SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 7.5 MII Bus Interface Signals ( 0.39 * VDDIO 0.39 * VDDIO 0.39 * VDDIO 0.39 * VDDIO 0.39 * VDDIO - ...

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... OL OH +12 mA +0.4 VDD2A – +0.4 +12 mA +0.4 VDD2A – +0 ( +0.4 VDDIO – +0 +0.4 VDDIO – +0 +0.4 VDDIO – +0 +0.4 VDDIO – +0 +0.4 VDDIO – +0 +0.4 VDDIO – +0 +0.4 VDDIO – +0 ( +0.4 VDDIO – +0.4 SMSC LAN8710/LAN8710i ...

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... Overshoot & Undershoot Jitter Note 7.4 Measured at the line side of the transformer, line replaced by 100Ω (± 1%) resistor. Note 7.5 Offset from 16 nS pulse width at 50% of pulse peak Note 7.6 Measured differentially. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint PULL-UP OR PULL-DOWN Pull-up Pull-down Pull-up Pull-up ...

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... Receiver Differential Squelch Threshold Note 7.7 Min/max voltages guaranteed as measured with 100Ω resistive load. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR SYMBOL MIN TYP MAX V 2.2 2.5 OUT V 300 420 DS 72 DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES 2.8 V Note 7.7 585 mV SMSC LAN8710/LAN8710i ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet Chapter 8 Application Notes 8.1 Application Diagram The LAN8710 requires few external components. The voltage on the magnetics center tap can range from 2.5 - 3.3V. 8.1.1 MII Diagram MII MDIO MDC nINT TXD[3:0] 4 TXCLK TXER TXEN RXD[3:0] 4 RXCLK ...

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... RBIAS 19 nRST VSS 49.9 Ohm Resistors Magnetic Supply 2.5 - 3.3V C BYPASS C Magnetics BYPASS C BYPASS Figure 8.4 Copper Interface Diagram 74 DATASHEET ® Technology in a Small Footprint Datasheet Analog Supply 3.3V Power to magnetics interface BYPASS 1 C BYPASS 32 12.1k RJ45 1000 SMSC LAN8710/LAN8710i ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet 8.2 Magnetics Selection For a list of magnetics selected to operate with the SMSC LAN8710, please refer to the Application note “AN 8-13 Suggested Magnetics”. http://www.smsc.com/main/appnotes.html#Ethernet%20Products SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 75 DATASHEET Revision 1.0 (04-15-09) ...

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... Chapter 9 Package Outline Figure 9.1 LAN8710/LAN8710i-EZK 32 Pin QFN Package Outline 0.9 mm Body (Lead-Free) Table 9.1 32 Terminal QFN Package Parameters MIN NOMINAL A 0. 0.20 REF D 4.85 D1 4.55 D2 3.15 E 4.85 E1 4.55 E2 3.15 L 0.30 e 0.50 BSC b 0.18 ccc ~ Notes: 1. Controlling Unit: millimeter. 2. Dimension b applies to plated terminals and is measured between 0.15mm and 0.30mm from the terminal tip. Tolerance on the true position of the leads is ± ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet Figure 9.1 QFN, 5x5 Taping Dimensions and Part Orientation SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 77 DATASHEET Revision 1.0 (04-15-09) ...

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... Figure 9.2 Reel Dimensions for 12mm Carrier Tape Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR 78 DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i ...

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... MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet Figure 9.3 Tape Length and Part Quantity Note: Standard reel size is 4000 pieces per reel. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 79 DATASHEET Revision 1.0 (04-15-09) ...