lan9220 Standard Microsystems Corp., lan9220 Datasheet

lan9220

Manufacturer Part Number

lan9220

Description

16-bit Non-pci Small Form Factor 10/100 Ethernet Controller With Variable Voltage I/o & Hp Auto-mdix Support

Manufacturer

Standard Microsystems Corp.

Datasheet

1.LAN9220.pdf (150 pages)

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PRODUCT FEATURES

Highlights

Key Benefits

SMSC LAN9220

Target Applications

Efficient architecture with low CPU overhead

Easily interfaces to most 16-bit embedded CPU’s

1.8V to 3.3V variable voltage I/O accommodates wide

Integrated PHY with HP Auto-MDIX support

Integrated checksum offload engine helps reduce

Low pin count and small body size package for small

Cable, satellite, and IP set-top boxes

Digital video recorders

Video-over IP solutions, IP PBX & video phones

Wireless routers & access points

Audio distribution systems

Printers, kiosks, security systems

General embedded applications

Non-PCI Ethernet controller for standard performance

Minimizes dropped packets

Minimizes CPU overhead

Reduces system cost and increases design flexibility

SRAM-like interface easily interfaces to most

Reduced Power Modes

range of I/O signalling without voltage level shifters

CPU load

form factor system designs

applications

— 16-bit interface

— Burst-mode read support

— Internal buffer memory can store over 200 packets

— Automatic PAUSE and back-pressure flow control

— Supports Slave-DMA

— Interrupt Pin with Programmable Hold-off timer

embedded CPU’s or SoC’s

— Numerous power management modes

— Wake on LAN

— Magic packet wakeup

— Wakeup indicator event signal

— Link Status Change

16-bit Non-PCI Small Form Factor

10/100 Ethernet Controller with

Variable Voltage I/O & HP Auto-MDIX

Support

DATASHEET

Single chip Ethernet controller

Flexible address filtering modes

Integrated 10/100 Ethernet PHY

Host bus interface

Miscellaneous features

Single 3.3V Power Supply with Variable Voltage I/O

0°C to +70°C Commercial Temperature Support

— Fully compliant with IEEE 802.3/802.3u standards

— Integrated Ethernet MAC and PHY

— 10BASE-T and 100BASE-TX support

— Full- and Half-duplex support

— Full-duplex flow control

— Backpressure for half-duplex flow control

— Preamble generation and removal

— Automatic 32-bit CRC generation and checking

— Automatic payload padding and pad removal

— Loop-back modes

— One 48-bit perfect address

— 64 hash-filtered multicast addresses

— Pass all multicast

— Promiscuous mode

— Inverse filtering

— Pass all incoming with status report

— Disable reception of broadcast packets

— Supports HP Auto-MDIX

— Auto-negotiation

— Supports energy-detect power down

— Simple, SRAM-like interface

— 16-bit data bus

— 16Kbyte FIFO with flexible TX/RX allocation

— One configurable host interrupt

— Small form factor, 56-pin QFN lead-free RoHS

— Integrated 1.8V regulator

— Integrated checksum offload engine

— Mixed endian support

— General Purpose Timer

— Optional EEPROM interface

— Support for 3 status LEDs multiplexed with

LAN9220

Compliant package

Programmable GPIO signals

Revision 2.6 (12-04-08)

Datasheet

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