ata6831c ATMEL Corporation, ata6831c Datasheet

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ata6831c

Manufacturer Part Number
ata6831c
Description
Triple Half-bridge Driver With Spi And Pwm
Manufacturer
ATMEL Corporation
Datasheet

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Features
1. Description
The Atmel
nology. They are used to allow a microcontroller to control up to three different loads
in automotive and industrial applications.
Each of the three high-side and three low-side drivers is capable of driving currents up
to 1.0A. Due to the enhanced PWM signal (up to 25kHz) it is possible to generate a
smooth control of, for example, a DC motor without any noise. The drivers are inter-
nally connected to form three half-bridges and can be controlled separately from a
standard serial data interface, enabling all kinds of loads, such as bulbs, resistors,
capacitors and inductors, to be combined. The IC design especially supports the
application of H-bridges to drive DC motors.
Protection is guaranteed with respect to short-circuit conditions, overtemperature and
undervoltage. Various diagnostic functions and a very low quiescent current in
standby mode enable a wide range of applications. Automotive qualification (protec-
tion against conducted interferences, EMC protection and 2-kV ESD protection) gives
added value and enhanced quality for exacting requirements of automotive
applications.
Supply Voltage up to 40V
R
Up to 1.0A Output Current
Three Half-bridge Outputs Formed by Three High-side and Three Low-side Drivers
Capable of Switching Loads such as DC Motors, Bulbs, Resistors, Capacitors, and
Inductors
PWM Capability up to 25kHz for Each High-side Output Controlled by External PWM
Signal
No Shoot-through Current
Very Low Quiescent Current I
Outputs Short-circuit Protected
Selective Overtemperature Protection for Each Switch and Overtemperature
Prewarning
Undervoltage Protection
Various Diagnostic Functions such as Shorted Output, Open Load, Overtemperature
and Power-supply Fail Detection
Serial Data Interface, Daisy Chain Capable, up to 2MHz Clock Frequency
QFN18 Package
DSon
Typically 0.8Ω at 25°C, Maximum 1.5Ω at 150°C
®
ATA6831C provides fully protected driver interfaces designed in SOI tech-
VS
< 2µA in Standby Mode over Total Temperature Range
Triple
Half-bridge
Driver with SPI
and PWM
Atmel
ATA6831C
Preliminary
9215C–AUTO–06/11

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ata6831c Summary of contents

Page 1

... QFN18 Package 1. Description ® The Atmel ATA6831C provides fully protected driver interfaces designed in SOI tech- nology. They are used to allow a microcontroller to control up to three different loads in automotive and industrial applications. Each of the three high-side and three low-side drivers is capable of driving currents ...

Page 2

... Figure 1-1. Block Diagram Input register Ouput register CLK Fault DO detector 7 PWM 6 Fault detector 1 OUT3S Atmel ATA6831C Preliminary Serial interface O n ...

Page 3

... OUT1S Used only for final testing connected to OUT1F 17 PGND1 Power ground OUT1 18 PGND3 Power ground OUT3 9215C–AUTO–06/11 Atmel ATA6831C Preliminary OUT3S 1 12 OUT2F OUT3F 2 11 VS2 ...

Page 4

... CLK DO TP S1L S1H Table 3-1. Bit Atmel ATA6831C Preliminary 4 LS2 HS2 LS3 HS3 PL1 PH1 S2L S2H S3L S3H Input Data Protocol Input Register Function Status register reset (high = reset; the bits PSF and OVL in the output ...

Page 5

... 9215C–AUTO–06/11 Atmel ATA6831C Preliminary Output Data Protocol Output (Status) Register Function TP Temperature prewarning: high = warning Normal operation: high = output is on, low = output is off Open-load detection: high = open load, low = no open load Status LS1 (correct load condition is detected if the corresponding output is switched off) ...

Page 6

... I /I Out1-3L Switching on an output stage with the OLD bit set to low disables the open-load function for this output. Figure 3-2. Atmel ATA6831C Preliminary 6 . The outputs are enabled immediately when the supply dUV Figure 3-2. . ...

Page 7

... Switching the high side outputs is possible up to 25kHz, low side switches up to 8kHz. Figure 3-3. 9215C–AUTO–06/11 Atmel ATA6831C Preliminary , the temperature prewarning bit (TP) in the output register is set. When the ). The over-load detection bit (OVL) is set and the corresponding dSd ...

Page 8

... Thermal resistance from junction to ambient 6. Operating Range Parameters Supply voltage Logic supply voltage Logic input voltage Serial interface clock frequency PWM input frequency Junction temperature range Note: 1. Threshold for undervoltage description Atmel ATA6831C Preliminary 8 Pin Symbol 10 10 VCC ...

Page 9

... Delay time between rising/falling edge of input signal at pin PWM and switch on/off output stages to 90% of final level. 3. Difference between switch-on and switch-off delay time of input signal at pin PWM to output stages in PWM mode. 9215C–AUTO–06/11 Atmel ATA6831C Preliminary Test Conditions ISO 7637-1 VDE 0879 Part 2 ESD S 5 ...

Page 10

... Delay time between rising/falling edge of input signal at pin PWM and switch on/off output stages to 90% of final level. 3. Difference between switch-on and switch-off delay time of input signal at pin PWM to output stages in PWM mode. Atmel ATA6831C Preliminary 10 < 150°C; unless otherwise specified, all values refer to GND pins. ...

Page 11

... Delay time between rising/falling edge of input signal at pin PWM and switch on/off output stages to 90% of final level. 3. Difference between switch-on and switch-off delay time of input signal at pin PWM to output stages in PWM mode. 9215C–AUTO–06/11 Atmel ATA6831C Preliminary < 150°C; unless otherwise specified, all values refer to GND pins. j ...

Page 12

... CLK period time 8.12 CLK setup time 8.13 CLK setup time 8.14 DI setup time 8.15 DI hold time *) Type means: A =100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6831C Preliminary 12 < 150°C; unless otherwise specified, all values refer to GND pins. j Symbol Pin = 2mA ...

Page 13

... Figure 9-1. Serial Interface Timing with Chart Number CS 4 CLK 3 DI CLK DO Inputs DI, CLK, CS: High level = 0.7 Output DO: High level = 0.8 9215C–AUTO–06/11 Atmel ATA6831C Preliminary low level = 0 low level = 0 ...

Page 14

... Electrolytic capacitor C > 22µF in parallel with a ceramic capacitor C = 100nF. The • Recommended value for capacitors at V – Electrolytic capacitor C > 10µF in parallel with a ceramic capacitor C = 100nF. • To reduce thermal resistance, place cooling areas on the PCB as close as possible to the GND pins and to the die pad. Atmel ATA6831C Preliminary ...

Page 15

... Ordering Information Extended Type Number ATA6831C-PIQW 12. Package Information PIN 1 ID Package Drawing Contact: packagedrawings@atmel.com 9215C–AUTO–06/11 Atmel ATA6831C Preliminary Package QFN18, 4mm × 4mm Top View Side View Bottom View 10:1 b TITLE Package: VQFN_4x4_18L Exposed pad 2 ...

Page 16

... Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 9215C-AUTO-06/11 9215B-AUTO-01/11 Atmel ATA6831C Preliminary 16 History • Package Information: drawing changed • Features on page 1 changed • Section 3.6 “Inhibit” on page 7 changed • ...

Page 17

... Atmel , Atmel logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellec- tual property right is granted by this document or in connection with the sale of Atmel products ...

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