mc44463 ETC-unknow, mc44463 Datasheet

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mc44463

Manufacturer Part Number
mc44463
Description
Replay Multiple Picture-in-picture Controller
Manufacturer
ETC-unknow
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc44463B
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Product Preview
Picture-in-Picture
(PIP) Controller
a family of high performance PIP controllers and video processors for
television. It is a follow–up to the MC44461 PIP, in which two additional
modes of operation have been added. A replay mode is provided, which
captures several seconds of the main picture for replay in four different
speeds. The capture time is programmable in four resolutions (ratio of
captured fields to total fields), which trade the number of fields captured to
the length of replay time. The second additional mode provides for multiple
small picture overlays from a second non–synchronized source. The number
of PIP images is 3 for the 1/9 screen area and 4 for the 1/16 screen area.
Like the MC44461 this is NTSC compatible, I 2 C bus controlled and available
in the 56–pin shrink dip (SDIP) package.
This document contains information on a product under development. Motorola reserves the
right to change or discontinue this product without notice.
MOTOROLA ANALOG IC DEVICE DATA
Seconds of Capture and Replay Mode, and a 3 or 4 Multiple PIP Mode –
Vertical Stacked with 1 Active at Any One Time
1 Times Acquire Speed; 1/2; 1/4; 1/8
Store/Playback Memory Interference – “Joint Line”
The MC44463 Picture–In–Picture (PIP) controller is a low cost member of
The main features of the MC44463 are:
Three PIP Functional Modes: Standard Single Active PIP Mode, Up to 8
4 Capture Resolutions – 1 out of 10, 1:8, 1:6, 1:4. 4 Playback Speeds =
Full 2 Frame Store for the Single PIP Removes the Rolling
External Memory for Replay and Multiple Modes: 4 Meg and 16 Meg
Two NTSC CVBS Inputs – Switchable Main and PIP Video Signals
Single NTSC CVBS Output Allows Simple TV Chassis Integration
Two PIP Sizes; 1/16 and 1/9 Screen Area – Freeze Field Feature
Variable PIP Position in 64–X by 64–Y Steps
PIP Border with Programmable Color
Programmable PIP Tint and Saturation Control
Automatic Main to PIP Contrast Balance
Vertical Filter
I 2 C Bus Control – No External Variable Adjustments Needed
Operates from a Single 5.0 V Supply
Economical 56–Pin Shrink DIP Package
Back Panel
Video Input
Composite
Tuner/IF
Composite Video Simplified System Diagram
CV
CV 1
CV 2
MC44463
PIP
IIC
MC44463B
Motorola, Inc. 1996
Device
Memory
Meg
4
Order this document from Analog Marketing
REPLAY AND MULTIPLE
PICTURE–IN–PICTURE
56
(PIP) CONTROLLER
ORDERING INFORMATION
CV in
MC44463
SEMICONDUCTOR
Temperature Range
T J = –65 to +150 C
TECHNICAL DATA
PLASTIC PACKAGE
1
Operating
Processor
B SUFFIX
CASE 859
Video
(SDIP)
R
G
B
Package
SDIP
Issue 1
1

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mc44463 Summary of contents

Page 1

... Product Preview Picture-in-Picture (PIP) Controller The MC44463 Picture–In–Picture (PIP) controller is a low cost member of a family of high performance PIP controllers and video processors for television follow–up to the MC44461 PIP, in which two additional modes of operation have been added. A replay mode is provided, which captures several seconds of the main picture for replay in four different speeds ...

Page 2

... Vertical Countdown Window Vertical Sync Integration Time ANALOG TO DIGITAL CONVERTER Resolution Integral Non–Linearity Differential Non–Linearity ADC – Y Frequency Response @ –5.0 dB ADC – Frequency Response @ –5.0 dB Sample Clock Frequency (4 MC44463 Symbol Value Unit V DD –0 –0 – ...

Page 3

... S/C Osc + PLL Encoder Encoder Encoder Clamp Caps PLL Xtal This device contains approximately 300,000 active transistors. MOTOROLA ANALOG IC DEVICE DATA MC44463 ( 5 unless otherwise noted.) Symbol – – – – – – – – – – ...

Page 4

... RASN MCM54400A–C 4 MC44463 Figure 2. Application Circuit H in MC44463 N N SCL Encoder V Cap 3 54 SDA Encoder U Cap 4 53 Reset Endoder Y Cap 5 52 Test Clock ADC Mid Ref Filter ...

Page 5

... Base write address = 26h Base read address = 27h Read Register There are two active bits in the single read byte available from the MC44463 as follows: Write Vertical Indicator (WVI0) – D7 When 0 indicates that the write operation specified by the last command has been completed. ...

Page 6

... Since the Chroma passes through a bandpass filter and the color decoder delayed with respect to the Luma signal. Therefore, to time match the Luma and Chroma these 6 MC44463 bits are set to a single value determined to be correct in the application. PIP Acquire/Playback Register Sub– ...

Page 7

... PB 0C INTC MACR Function Control of the MC44463 There are three modes of operation; Single PIP, Multiple PIP and Replay. These are enabled by setting specific register bits in the register set. Single PIP (SPIP) Operation Register 0Bh : D6 –> 0 Register 05h : D0–D7 –> 01h Multiple PIP (MPIP) Operation Register 05h : D0– ...

Page 8

... INCHES MILLIMETERS DIM MIN MAX MIN MAX A 2.035 2.065 51.69 52.45 B 0.540 0.560 13.72 14.22 C 0.155 0.200 3.94 5.08 D 0.014 0.022 0.36 0.56 E 0.035 BSC 0.89 BSC F 0.032 0.046 0.81 1.17 G 0.070 BSC 1.778 BSC H 0.300 BSC 7.62 BSC J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L 0.600 BSC 15.24 BSC 0.020 0.040 0.51 1.02 M *MC44463/D* MC44463/D ...

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