sx1508bevk Semtech Corporation, sx1508bevk Datasheet - Page 14

• Manufacturer Part Number: sx1508bevk
• Manufacturer: Semtech Corporation

ADVANCED COMMUNICATIONS & SENSING
Please note that a brown-out event is defined as a transient event on VDDM. If VDDM is attached to a battery,
then the gradual decay of the battery voltage will not be interpreted as a brown-out event.
Please also note that a sharp rise in VDDM (> 1V/us) may induce a circuit reset.
4.4.2
Writing consecutively 0x12 and 0x34 to RegReset register will reset all registers to their default values.
4.5
The SX1507B, SX1508B and SX1509B 2-wire interface operates only in slave mode. In this configuration, the
device has one or 4 possible devices addresses defined by ADDR[1:0] pins:
2 lines are used to exchange data between an external master host and the slave device:
The SX1507B, SX1508B and SX1509B are read-write slave-mode I
standard Version 2.1 dated January, 2000. The SX1507B, SX1508B and SX1509B have a few user-accessible
internal 8-bits registers to set the various parameters of operation (Cf. §5 for detailed configuration registers
description). The I
sent to the SX1507B, SX1508B or SX1509B enabling it to be a slave transmitter/receiver, any register can be
written or read independently of each other. The start and stop commands frame the data-packet and the repeat
start condition is allowed if necessary.
Seven bit addressing is used and ten bit addressing is not allowed. Any general call address will be ignored by
the SX1507B, SX1508B and SX1509B. The SX1507B, SX1508B and SX1509B are not CBUS compatible and
can operate in standard mode (100kbit/s) or fast mode (400kbit/s).
4.5.1
After the start condition [S], the slave address (SA) is sent, followed by an eighth bit (‘0’) indicating a Write. The
slave then Acknowledges [A] that it is being addressed, and the Master sends an 8 bit Data Byte consisting of
the slave Register Address (RA). The Slave Acknowledges [A] and the master sends the appropriate 8 bit Data
Byte (WD0). Again the slave Acknowledges [A]. In case the master needs to write more data, a succeeding 8 bit
Data Byte will follow (WD1), acknowledged by the slave [A]. This sequence will be repeated until the master
terminates the transfer with the Stop condition [P].
Rev 3 – 9
4. During a brown-out event, if VDDM drops above VDROPH a reset will not occur.
5. During a brown-out event, if VDDM drops between VDROPH and VDROPL a reset may occur.
6. During a brown-out event, if VDDM drops below VDROPL a reset will occur next time VPOR is crossed.
2-Wire Interface (I
Software (RegReset)
SCL : Serial CLock
SDA : Serial DAta
WRITE
th
SX1507B &
SX1508B
SX1509B
Sept. 2010
Device
2
C interface has been designed for program flexibility, in that once the slave address has been
2
ADDR[1:0]
C)
00
01
10
11
00
01
10
11
Figure 9 - 2-Wire Serial Interface, Write Operation
Table 7 - 2-Wire Interface Address
0x3E (0111110)
0x20 (0100000)
0x21 (0100001)
0x22 (0100010)
0x23 (0100011)
0x3F (0111111)
0x70 (1110000)
0x71 (1110001)
Address
14
Description
First address of the 2-wire interface
Second address of the 2-wire interface
Third address of the 2-wire interface
Fourth address of the 2-wire interface
First address of the 2-wire interface
Second address of the 2-wire interface
Third address of the 2-wire interface
Fourth address of the 2-wire interface
World’s Lowest Voltage Level Shifting GPIO
2
SX1507B/SX1508B/SX1509B
C devices and comply with the Philips I
with LED Driver and Keypad Engine
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2
C