hcpl273 Fairchild Semiconductor, hcpl273 Datasheet
hcpl273
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hcpl273 Summary of contents
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... GND 4 5 N/C 6N138 / 6N139 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 Description The 6N138/9 and HCPL2730/HCPL2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. The split darlington configuration separating the input photodiode and the first stage gain from the output ...
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... Emitter-Base Reverse Voltage Supply Voltage, Output Voltage Output Power Dissipation O ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0 25°C unless otherwise specified) A Parameter Each Channel Each Channel Each Channel Each Channel Each Channel 6N138 and 6N139 ...
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... COUPLED CTR Current Transfer (1)(2) Ratio V Logic LOW Output OL (2) Voltage *All Typicals 25°C A ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0 70°C unless otherwise specified) A Test Conditions T = 25°C A Each channel (I = 1.6mA 25° 10µA ...
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... HIGH (Fig. 25) |CM | Common Mode (I L Transient T Immunity at Logic (3) LOW (Fig. 25) ** All Typicals 25°C A ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued 70°C unless otherwise specified 5V) CC Test Conditions = 4 0.5mA 25° 4 0.5mA L ...
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... For dual channel devices, C I-O shorted together. 6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. I ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued 70°C unless otherwise specified) A Test Conditions Relative humidity = 45%, 5s, V ...
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... Resistor Input Current of Output Gate 2 V DD1 Fig. 2 Non-Inverting Logic Interface ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued 25°C unless otherwise specified) A OL1 CMOS INPUT R1 ( (V) CMOS NON-INV. 2000 1000 @ 5V INV. ...
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... Fig. 5 LED Forward Voltage vs. Temperature 1 1 1.4 1.3 1.2 1.1 -40 - TEMPERATURE - T (˚C) A Fig. 7 Non-saturated Rise and Fall Times vs. Load Resistance (HCPL2730 / HCPL2731 Only 25˚ 0 LOAD RESISTANCE ( Fig. 9 Current Transfer Ratio vs. Forward Current (6N138 / 6N139 Only ...
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... 25˚ 0˚ -40˚ 0.01 0 INPUT DIODE FORWARD CURRENT -mA ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued) Fig. 11 Current Transfer Ratio vs. Forward Current 5000 4000 3000 2000 1000 I = 1.6mA 0 ...
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... Only) 100 6N139 I = 0.5mA 4.7k L 6N138 I = 1.6mA 2.2k L 0.1 0.01 0 INPUT PULSE PERIOD - ms ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued) 100 18V Fig. 19 Propagation Delay vs. Input Diode Forward Current 4.7 k ...
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... PLH (HCPL2731) PHL 10 t (HCPL2730) PHL TEMPERATURE (˚C) A ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued) 50 HCPL2730 : I HCPL2731 : (HCPL2730) PLH Fig. 23 Propagation Delay vs. Temperature (HCPL2730 / HCPL2731 Only) = 1.6mA ...
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... Test Circuit for HCPL2730 and HCPL2731 PLH Noise Shield 0.1 µ GND Pulse Gen Test Circuit for HCPL2730 and HCPL2731 www.fairchildsemi.com + pF ...
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... MIN 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 0.4" Lead Spacing 0.200 (5.08) 0.140 (3.55) 15 MAX 0.300 (7.62) TYP 0.022 (0.56) 0.016 (0.41) 8-Pin DIP – Land Pattern 0.415 (10.54) ...
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... Marking Information Definitions ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 Example Part Number 6N138 Standard Through Hole Device, 50 pcs per tube 6N138S Surface Mount Lead Bend 6N138SD Surface Mount; Tape and reel 6N138W 0.4" Lead Spacing ...
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... Tape Specifications 4.90 0.20 0.30 13.2 0.2 0.1 MAX User Direction of Feed Reflow Profile 300 250 200 150 100 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 12.0 0.1 4.0 0.1 4.0 0.1 0.05 10.30 0.20 225C peak Time above 183C, 60–150 sec 50 Ramp up = 3C/sec 0 0 0.5 1 1.5 2 2.5 3 Time (Minute) • Peak reflow temperature: 225C (package surface temperature) • ...
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... Product Status Advance Information Formative / In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 PDP SPM™ FPS™ F-PFS™ Power-SPM™ ® FRFET PowerTrench SM Programmable Active Droop™ ...