SY10/100E104 Micrel Semiconductor, SY10/100E104 Datasheet
SY10/100E104
Manufacturer Part Number
SY10/100E104
Description
Manufacturer
Micrel Semiconductor
Datasheet
1.SY10100E104.pdf
(4 pages)
FEATURES
BLOCK DIAGRAM
600ps max. propagation delay
Extended 100E V
True and complementary outputs
OR/NOR function outputs
Fully compatible with Industry standard 10KH,
100K I/O levels
Internal 75K input pulldown resistors
Fully compatible with Motorola MC10E/100E104
Available in 28-pin PLCC package
D
D
D
D
D
D
D
D
D
D
0a
1a
1b
2a
2b
3a
3b
4a
4b
0b
EE
range of –4.2V to –5.5V
QUINT 2-INPUT
AND/NAND GATE
F
F
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
0
0
1
1
2
2
3
3
4
4
1
designed for use in new, high-performance ECL systems.
The E104 also features a function output, F, which is the
OR of all five AND gate outputs, while F is the NOR. Both
true and complementary outputs are provided.
DESCRIPTION
PIN CONFIGURATION
PIN NAMES
The SY10/100E104 are quint 2-input AND/NAND gates
D
Q
Q
F
F
V
na
CCO
0
0
Pin
-Q
-Q
V
D
D
D
, D
D
D
D
EE
3b
2b
1a
4
4
2a
0a
1b
nb
2
3
4
26
27
28
1
25 24 23 22 21 20 19
5
Data Inputs
AND Outputs
NAND Outputs
OR Output
NOR Output
V
CC
6
TOP VIEW
to Output
7
PLCC
J28-1
8
Function
9
10 11
Rev.: E
Issue Date: November, 1998
18
17
16
15
14
13
12
SY100E104
SY10E104
Q
Q
Q
Q
V
Q
Q
Amendment: /0
FINAL
CC
4
3
3
4
2
2
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SY10/100E104 Summary of contents
Page 1
... QUINT 2-INPUT AND/NAND GATE DESCRIPTION The SY10/100E104 are quint 2-input AND/NAND gates designed for use in new, high-performance ECL systems. The E104 also features a function output, F, which is the OR of all five AND gate outputs, while F is the NOR. Both true and complementary outputs are provided. ...
Page 2
Micrel LOGIC EQUATION • • ELECTRICAL CHARACTERISTICS (Min (Max.); Symbol Parameter I Input ...
Page 3
Micrel 28 LEAD PLCC (J28-1) 3 SY10E104 SY100E104 Rev. 03 ...
Page 4
Micrel MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 TEL This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents ...