74act02scx-nl Fairchild Semiconductor, 74act02scx-nl Datasheet

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74act02scx-nl

Manufacturer Part Number
74act02scx-nl
Description
74ac02, 74act02 Quad 2-input Nor Gate
Manufacturer
Fairchild Semiconductor
Datasheet
©1988 Fairchild Semiconductor Corporation
74AC02, 74ACT02 Rev. 1.4
74AC02, 74ACT02
Quad 2-Input NOR Gate
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
(PC not available in Tape and Reel.) Pb-Free package per JEDEC J-STD-020B.
Note:
1. Device available in Tape and Reel only.
Connection Diagram
Pin Description
74AC02SC
74AC02SCX_NL
74AC02SJ
74AC02MTC
74AC02PC
74ACT02SC
74ACT02MTC
A
O
Order Number
I
Outputs source/sink 24mA
ACT02 has TTL-compatible inputs
n
n
CC
, B
n
reduced by 50% on 74AC02 only
Pin Names
(1)
Package
Number
MTC14
MTC14
M14D
M14A
M14A
M14A
N14A
Inputs
Outputs
Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
General Description
The AC02/ACT02 contains four, 2-input NOR gates.
Logic Symbol
Package Description
IEEE/IEC
www.fairchildsemi.com
April 2007
tm

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74act02scx-nl Summary of contents

Page 1

... Inputs Outputs n ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 General Description The AC02/ACT02 contains four, 2-input NOR gates. Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5 ...

Page 2

... Output Voltage O T Operating Temperature A ∆ ∆ t Minimum Input Edge Rate, AC Devices: V from 30 ∆ ∆ t Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating –0.5V to +7.0V –20mA +20mA – ...

Page 3

... All outputs loaded; thresholds on input associated with output under test. 3. Maximum test duration 2.0ms, one output loaded at a time and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 = +25° ...

Page 4

... Minimum Dynamic OLD (6) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 5. All outputs loaded; thresholds on input associated with output under test. 6. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 = +25° (V) Conditions Typ. = 0. ...

Page 5

... Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V. AC Electrical Characteristics for ACT Symbol Parameter t Propagation Delay PLH t Propagation Delay PHL Note: 8. Voltage Range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 = +25° 50pF C L (7) V (V) Min. Typ. Max. CC 3.3 1.5 5.0 7.5 5.0 1.5 4 ...

Page 6

... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 Package Number M14A 6 www.fairchildsemi.com ...

Page 7

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 Package Number M14D 7 www.fairchildsemi.com ...

Page 8

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 Package Number MTC14 8 www.fairchildsemi.com ...

Page 9

... Physical Dimensions (Continued) Dimensions are in inches (millimeters) unless otherwise noted. Figure 4. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide ©1988 Fairchild Semiconductor Corporation 74AC02, 74ACT02 Rev. 1.4 Package Number N14A 9 www.fairchildsemi.com ...

Page 10

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...

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