74lcx841 Fairchild Semiconductor, 74lcx841 Datasheet

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74lcx841

Manufacturer Part Number
74lcx841
Description
74lcx841 Low Voltage 10-bit Transparent Latch With 5v Tolerant Inputs And Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
© 2001 Fairchild Semiconductor Corporation
74LCX841WM
74LCX841MSA
74LCX841MTC
74LCX841
Low Voltage 10-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs
General Description
The LCX841 consists of ten latches with 3-STATE outputs
for bus organized system applications. The device is
designed for low voltage (2.5V or 3.3V) V
with capability of interfacing to a 5V signal environment.
The LCX841 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Order Number
Package Number
MSA24
MTC24
IEEE/IEC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
CC
applications
DS012575
Features
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
Connection Diagram
5V tolerant inputs and outputs
2.3V
8.0 ns t
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
24 mA output drive (V
Human Body Model
Machine Model
Package Description
3.6V V
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
200V
3.3V), 10 A I
CC
2000V
3.0V)
October 1995
Revised March 2001
CC
www.fairchildsemi.com
max

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74lcx841 Summary of contents

Page 1

... MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LCX841MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Pin Descriptions Pin Names Description D –D Data Inputs Latch Enable Input OE Output Enable Input O –O 3-STATE Latch Outputs 0 9 Functional Description The LCX841 consists of ten D-type latches with 3-STATE outputs. The flip-flops ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

DC Electrical Characteristics Symbol Parameter I Quiescent Supply Current CC I Increase in I per Input CC CC Note 5: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL PLH n ...

Page 5

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number M24B Package Number MSA24 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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