nl27wz125

Manufacturer Part Numbernl27wz125
DescriptionDual Buffer With 3-state Outputs
ManufacturerON Semiconductor
nl27wz125 datasheet
 


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NL27WZ125
Dual Buffer with 3−State
Outputs
The NL27WZ125 is a high performance dual noninverting buffer
operating from a 1.65 V to 5.5 V supply.
Features
Extremely High Speed: t
2.6 ns (typical) at V
PD
Designed for 1.65 V to 5.5 V V
CC
Over Voltage Tolerant Inputs and Outputs
LVTTL Compatible − Interface Capability With 5 V TTL Logic with
V
= 3 V
CC
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
3−State OE Input is Active−Low
Replacement for NC7WZ125
Chip Complexity = 72 FETs
Pb−Free Package is Available
OE
1
1
A
2
1
Y
3
2
GND
4
Figure 1. Pinout (Top View)
A
1
1
OE
EN
1
A
2
OE
2
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 5
= 5 V
CC
Operation
8
V
CC
7
OE
2
6
Y
1
5
A
2
Y
1
Y
2
1
http://onsemi.com
MARKING
DIAGRAM
8
8
1
M0 M G
US8
G
US SUFFIX
CASE 493
1
M0
= Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon
manufacturing location.
PIN ASSIGNMENT
Pin
Function
1
OE
1
2
A
1
3
Y
2
4
GND
5
A
2
6
Y
1
7
OE
2
8
V
CC
FUNCTION TABLE
Input
Output
OE
A
Y
n
n
L
L
L
L
H
H
H
X
Z
X = Don’t Care
n = 1, 2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
NL27WZ125/D
n

nl27wz125 Summary of contents

  • Page 1

    ... NL27WZ125 Dual Buffer with 3−State Outputs The NL27WZ125 is a high performance dual noninverting buffer operating from a 1. 5.5 V supply. Features • Extremely High Speed: t 2.6 ns (typical • Designed for 1. 5 • Over Voltage Tolerant Inputs and Outputs • LVTTL Compatible − Interface Capability With 5 V TTL Logic with ...

  • Page 2

    ... V Output Voltage O T Operating Free−Air Temperature A Dt/DV Input Transition Rise or Fall Rate 5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level. NL27WZ125 Device Nomenclature Temp Range Device Package Identifier Function Suffix Technology ...

  • Page 3

    ... PLZ 6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. This specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t guaranteed by design. NL27WZ125 V CC (V) Min Condition 1 ...

  • Page 4

    ... PZL On Figure 5. AC Output Enable and Disable Waveform 2 V INPUT MHz square input wave is recommended for propagation delay tests. Figure PZL NL27WZ125 MHz 3 MHz 5 ...

  • Page 5

    ... 0.23 0.34 0.010 0.013 R 0.23 0.33 0.009 0.013 S 0.37 0.47 0.015 0.019 U 0.60 0.80 0.024 0.031 V 0.12 BSC 0.005 BSC 0.30 0.012 mm inches ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NL27WZ125 ...