at24c512b ATMEL Corporation, at24c512b Datasheet

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at24c512b

Manufacturer Part Number
at24c512b
Description
Two-wire Serial Eeprom 512k 65,536 X 8
Manufacturer
ATMEL Corporation
Datasheet

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Features
Description
The AT24C512B provides 524,288 bits of serial electrically erasable and programma-
ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The
device’s cascadable feature allows up to eight devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP,
8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is
available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.
Table 0-1.
Pin Name
A0–A2
SDA
SCL
WP
Low-voltage and Standard-voltage Operation
Internally Organized 65,536 x 8
Two-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (2.5V, 5.5V), 400 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
128-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Max)
High Reliability
Lead-free/Halogen-free Devices
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-ball dBGA2, and
8-lead Ultra Thin Small Array (SAP) Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Die
– 1.8v (V
– 2.5v (V
– Endurance: 1,000,000 Write Cycles
– Data Retention: 40 Years
VCC
SDA
SCL
WP
8-ball dBGA2
Bottom View
8
7
6
5
CC
CC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
Pin Configurations
= 1.8V to 3.6V)
= 2.5V to 5.5V)
1
2
3
4
A0
A1
A2
GND
8-lead Ultra Thin SAP
VCC
SDA
SCL
WP
GND
Bottom View
8
7
6
5
A0
A1
A2
8-lead TSSOP
1
2
3
4
1
2
3
4
A0
A1
A2
GND
8
7
6
5
VCC
WP
SCL
SDA
GND
A0
A1
A2
GND
8-lead SOIC
A0
A1
A2
1
2
3
4
8-lead PDIP
1
2
3
4
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
with Three Device Address Inputs
Two-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512B
Rev. 5297A–SEEPR–1/08

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at24c512b Summary of contents

Page 1

... Die Sales: Wafer Form, Waffle Pack and Bumped Die Description The AT24C512B provides 524,288 bits of serial electrically erasable and programma- ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus ...

Page 2

... Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 0-1. Block Diagram VCC GND WP SCL SDA AT24C512B 2 *NOTICE: START STOP LOGIC SERIAL CONTROL LOGIC LOAD COMP DEVICE ADDRESS LOAD COMPARATOR R/W DATA WORD ADDR/COUNTER Y DEC ...

Page 3

... WRITE PROTECT (WP): The write protect input, when connected to GND, allows normal write operations. When WP is connected directly to Vcc, all write operations to the memory are inhib- ited. If the pin is left floating, the WP pin will be internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pins to a known state ...

Page 4

... Memory Organization AT24C512B, 512K SERIAL EEPROM: The 512K is internally organized as 512 pages of 128-bytes each. Random word addressing requires a 16-bit data word address. (1) Table 2-1. Pin Capacitance Applicable over recommended operating range from: T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1 ...

Page 5

Table 2-3. AC Characteristics (Industrial Temperature) Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High ...

Page 6

... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C512B features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations ...

Page 7

Figure 3-2. Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL t SU.STA SDA IN SDA OUT Figure 3-3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle ...

Page 8

... Figure 3-4. Data Validity SDA SCL Figure 3-5. Start and Stop Definition SDA SCL Figure 3-6. Output Acknowledge SCL DATA IN DATA OUT AT24C512B 8 DATA STABLE DATA STABLE DATA CHANGE START 1 START STOP 8 9 ACKNOWLEDGE 5297A–SEEPR–1/08 ...

Page 9

... Upon a compare of the device address, the EEPROM will output a “0” compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C512B has a hardware data protection scheme that allows the user to Write Protect the whole memory when the WP pin ...

Page 10

... The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 6-1. Figure 6-2. Byte Write AT24C512B 10 11). Figure 6-5 on page 11). Figure 6-6 on page ...

Page 11

Figure 6-3. Page Write Figure 6-4. Current Address Read Figure 6-5. Random Read Figure 6-6. Sequential Read 5297A–SEEPR–1/08 11 ...

Page 12

... Ordering Information Ordering Code AT24C512B-PU (Bulk form only) AT24C512B-PU25 (Bulk form only) (1) AT24C512BN-SH-B (NiPdAu Lead Finish) (2) AT24C512BN-SH-T (NiPdAu Lead Finish) (1) AT24C512BN-SH25-B (NiPdAu Lead Finish) (2) AT24C512BN-SH25-T (NiPdAu Lead Finish) (1) AT24C512BW-SH-B (NiPdAu Lead Finish) (2) AT24C512BW-SH-T (NiPdAu Lead Finish) (1) AT24C512BW-SH25-B (NiPdAu Lead Finish) (2) AT24C512BW-SH25-T ...

Page 13

Part marking scheme: 7.1 8-PDIP(1.8V) TOP MARK Seal Year |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) 7.2 8-PDIP(2.5V) TOP MARK Seal Year |---|---|---|---|---|---|---|---| A T ...

Page 14

... Pin 1 Indicator (Dot) 7.4 8-SOIC(2.5V) TOP MARK |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) AT24C512B 14 Seal Year Y = SEAL YEAR | Seal Week 6: 2006 | | | 7: 2007 8: 2008 2009 Lot Number to Use ALL Characters in Marking BOTTOM MARK Seal Year Y = SEAL YEAR | Seal Week ...

Page 15

TOP MARK Pin 1 Indicator (Dot) | |---|---|---|---| * |---|---|---|---|---| |---|---|---|---|---| BOTTOM MARK |---|---|---|---|---|---|---| |---|---|---|---|---|---|---| |---|---|---|---|---|---|---| <- Pin 1 Indicator 7.6 8-TSSOP(2.5V) ...

Page 16

... Lot Number |---|---|---|---|---|---|---|---| * | Pin 1 Indicator (Dot) 7.8 8-Ultra Thin SAP (2.5V) TOP MARK Seal Year |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| Lot Number |---|---|---|---|---|---|---|---| * | Pin 1 Indicator (Dot) AT24C512B 16 | Seal Week Y = SEAL YEAR | | | 6: 2006 7: 2007 2008 9: 2009 | Seal Week Y = SEAL YEAR | | | 6: 2006 7: 2007 2008 ...

Page 17

TOP MARK LINE 1-------> LINE 2-------> Country of Origin Y = ONE DIGIT YEAR CODE 4: 2004 5: 2005 6: 2006 M = SEAL MONTH (USE ALPHA DESIGNATOR A- JANUARY B = FEBRUARY " ...

Page 18

... Package Information U2-1 - dBGA2 A1 BALL PAD CORNER e (e1) 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C512B TOP VIEW A1 BALL PAD CORNER (d1) BOTTOM VIEW ...

Page 19

PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are measured with the ...

Page 20

... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C512B TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing ...

Page 21

EIAJ SOIC e e Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs aren't included recommended ...

Page 22

... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT24C512B TITLE 8A2, 8-lead, 4 ...

Page 23

UTSAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5297A–SEEPR–1/08 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...

Page 24

... A1 BALL PAD CORNER e (e1) BOTTOM VIEW 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C512B TOP VIEW A1 BALL PAD CORNER (d1) ...

Page 25

... Revision History Doc. Rev. 5297A 5297A–SEEPR–1/08 Date Comments AT24C512B product with date code 2008 work week 14 (814) or later supports 5Vcc operation 1/2008 Initial document release 25 ...

Page 26

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. ©2008 Atmel Corporation. All rights reserved. Atmel Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...

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