s-24c08ci-t8t1u3 Seiko Instruments Inc., s-24c08ci-t8t1u3 Datasheet - Page 19

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s-24c08ci-t8t1u3

Manufacturer Part Number
s-24c08ci-t8t1u3
Description
2-wire Serial Eeprom S-24c08c 8k-bit
Manufacturer
Seiko Instruments Inc.
Datasheet
Rev.2.0
LINE
SDA
7. 2 Random Read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the S-24C08C receives a 7-bit device address and a 1-bit read / write instruction code set to “0” following a
start condition, it responds with an acknowledge.
And the S-24C08C receives 8-bit word address and responds with an acknowledge. The memory address is
loaded to the address counter in the S-24C08C by these operations. Reception of write data does not follow in a
dummy write whereas reception of write data follows in byte write and in page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device can
read the data starting from the arbitrary memory address by transmitting a new start condition and performing the
same operation in the current address read.
That is, when the S-24C08C receives a 7-bit device address and a 1-bit read / write instruction code set to “1”,
following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the S-
24C08C in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge, the
reading of S-24C08C is ended.
R
S
T
A
T
_00_H
M
S
B
1 0 1 0
ADDRESS
DEVICE
A2 P1 P0
DUMMY WRITE
S
B
L
W
W
R
R
E
T
0
/
I
A
C
K
W7 W6 W5 W4 W3 W2 W1 W0
WORD ADDRESS (n)
Figure 20 Random Read
Seiko Instruments Inc.
A
C
K
S
T
A
R
T
M
S
B
1 0 1 0
ADDRESS
DEVICE
2-WIRE CMOS SERIAL E
A2 P1 P0
L
S
B
W
R
R
D
E
A
1
/
A
C
K
D7 D6 D5 D4 D3 D2 D1 D0
NO ACK from
Master Device
DATA
S-24C08C
2
PROM
O
S
P
T
19

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