ncp1910 ON Semiconductor, ncp1910 Datasheet
ncp1910
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ncp1910 Summary of contents
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... TVs converters. With a 65 kHz Continuous Conduction Mode Power Factor Controller and a LLC controller hosting a high−voltage driver, the NCP1910 is ready to power 85+ types of offline power supplies. To satisfy stringent efficiency considerations, the PFC circuit implements an adjustable frequency fold back to reduce switching losses as the load is going light ...
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PIN DESCRIPTION Pin N5 Pin Name The LLC feedback pin 3 PG out The open−collector power good signal 4 on/off 5 BO adj. Brown−out adjustment 6 Vref The 5 V reference pin 7 PG adj. The ...
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http://onsemi.com 3 ...
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http://onsemi.com 4 ...
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OVP2 + “1” OVP2, “0” 107% Vpref Latched adjustable OVP2 − VOVP2 “1” OVP, “0” 105% Vpref − Auto−recovery internal OVP VOVP VUVP “1” = UVP, “0” ok RFB + pull down 8% Vpref − ...
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Vrt Rt Vref Vref "1" BONOT OK BO adj + - PFC_FB "1" PGNOT adj LLC_PG Grand Reset PG out PFC_OVP2 + - VCS2 Grand Reset PFC_BO CS/ VCS1 Vdd on/off Rpull up "1" ...
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MAXIMUM RATINGS TABLE Symbol V Continuous High Voltage bridge pin, pin 22 Bridge V –V Floating supply voltage, pin 24−22 BOOT Bridge High side output voltage, pin 23 MU DRV V Low side output voltage, pin 18, ...
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... Pull−up t Propagation delay from on to off (ML & MU are off) (Note 4) on/off V Low level input voltage on on/off pin (NCP1910 is enabled High level input voltage on on/off pin (NCP1910 is disabled) off V Open voltage on on/off pin op I Maximum Power good pin sink current capability PG ...
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ELECTRICAL CHARACTERISTICS (For typical values unless otherwise noted) Symbol POWER FACTOR CORRECTION REGULATION BLOCK V PFC Voltage reference PREF I Error Amplifier Current Capability EA G Error Amplifier Gain EA I Bias Current @ V = ...
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ELECTRICAL CHARACTERISTICS (For typical values unless otherwise noted) Symbol POWER FACTOR CORRECTION LINE BROWN−OUT DETECTION V Pull Down V Threshold LBO(PD) LBO t Pull Down V Time Limitation LBO(Pdlimit) LBO t Time Delay to Confirm that ...
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ELECTRICAL CHARACTERISTICS (For typical values unless otherwise noted) Symbol LLC CONTROL SECTION DRIVE OUTPUT T Output voltage rise−time @ Output voltage fall−time @ Source resistance LOH R Sink resistance LOL ...
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V CC(on) 10 CC(min) 8.5 8 −50 − TEMPERATURE (°C) Figure 6. V and V CC(on) CC(min) 100 −50 − TEMPERATURE (°C) Figure 8. I ...
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V off 2 1.5 1 −50 − TEMPERATURE (°C) Figure 12. V and V vs. Temperature on off 2.8 2.7 V OVP2 V OVP1 2.6 V PREF 2.5 2.4 −50 − ...
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TEMPERATURE (°C) Figure 18. V vs. Temperature CTRL(max) 260 250 240 230 220 210 200 190 −50 − TEMPERATURE (°C) Figure 20 vs. ...
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TEMPERATURE (°C) Figure 24. F vs. Temperature PSW 1.04 1.02 1 0.98 0.96 −50 − TEMPERATURE (°C) Figure 26. V vs. Temperature LBOT 18 ...
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TEMPERATURE (°C) Figure 30. F vs. Temperature Lsw 3.7 3.6 3.5 3.4 3.3 −50 − TEMPERATURE (°C) Figure 32. V vs. Temperature refRt 450 ...
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R 16 LOH, LOL, −50 − TEMPERATURE (°C) Figure 36. R and R LOH,MU Temperature 1.05 1.025 1 0.975 0.95 −50 − ...
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... Maximum Current Limit: the circuit permanently senses the inductor current and immediately turns off the power switch higher than the set current limit. The NCP1910 also prevents any turn on of the power switch as long as the inductor current is not below its maximum permissible level. This feature ...
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... CC input voltage is a rectified sinusoidal signal. The MOSFET is switching at a high frequency (typically 65 kHz in NCP1910) so that the inductor current I consists of high and low−frequency components. Filter capacitor C capacitor in order to eliminate the high−frequency component of the inductor I too bulky because it can pollute the power factor by distorting the rectified sinusoidal input voltage ...
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... PFC Methodology The NCP1910 uses a proprietary PFC methodology particularly designed for CCM operation. The PFC methodology is described in this section. Figure 42. Inductor Current in CCM As shown in Figure 42, the inductor current I switching period T includes a charging phase for duration t and a discharging phase for duration t conversion ratio is obtained in Equation 1 ...
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Figure 43. PFC Duty Modulation and Timing Diagram The PFC modulation and timing diagram is shown in Figure 43. The MOSFET on time t 1 intersection of reference voltage V PREF relationship in Equation 4 is obtained. ...
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Figure 45. The Multiplier Voltage Pin Configuration The multiplier voltage V is generated according to M Equation LBO CTRL CTRL(min) Where: R ...
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... UVLO or ON/OFF pin CC is released open or UVP or Thermal Shutdown. This is to guarantee that the circuit starts operation in the right state, which is “PFC_BO” high. When the NCP1910 is ready to work, the pnp transistor turns off and the circuit enables the I . LBOH ...
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... PFC Current Sense NCP1910 + GND SENSE L − Figure 47. PFC Current Sensing Configuration The device senses the inductor current I sense scheme in Figure 47. The device maintains the voltage at CS pin to be zero voltage, i ...
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PFC Reference Section The internal reference voltage (V PREF $2% accurate over the temperature range (the typical value is 2.5 V the reference used for the regulation of PREF PFC section. PFC Feedback and Compensation ...
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... PFC Frequency Foldback NCP1910 implements frequency foldback feature on PFC section to improve the efficiency at light load. Thanks feed−forward feature, the output power is proportional in to the (V − The PFC frequency foldback CTRL CTRL(min) Vref Vfold Vfold(max) Vctrl Figure 50. The PFC Frequency Foldback Block ...
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... Given the low bandwidth of the regulation block, the output voltage of PFC stages may exhibit excessive over or under−shoots because of abrupt load or input voltage variations (such as start−up duration). As shown in Figure 52, if the output voltage is out of regulation, NCP1910 has 2 functions to maintain the output voltage regulation. V bulk PFC_OK ...
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OTA is around 30 mA. Due to the “V block (VLD), when the V is below 95 extra 200 mA current source (I VLD raise V rapidly. Hence prevent ...
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... Thermal Shut−down (TSD), or • Line Brown−out, or • PFC Under−Voltage Protection At one of these situations, NCP1910 grounds the V pin and turns off the 200 mA current source in regulation block. When the IC turns on again: • V will be pulled low and PFC DRV output keeps ...
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PFC Abnormal The PFC abnormal is detected by sensing V When V stays lower than V CTRL CTRL(max) – 0.1 V, for more than t , PFC turns off first. After PFCabnormal t , LLC shuts ...
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... Brown−Out circuitry (BO) that offer a way to protect the resonant converter from operating at too low V mean time, NCP1910 provides a Power Good signal (PG to inform the isolated secondary side that the NCP1910 is in order of match. Once the PFC has started and raises V its regulated voltage, an internal “PFC_OK” signal is asserted ...
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... Figure 58. The PG and BO Block Diagram for LLC LLC Fast Fault Input (CS/FF Pin) As shown in Figure 59, the NCP1910 offers a dedicated input (CS/FF pin) to detect the primary over−current conditions and protect the power stage from damage. Once the voltage on the CS/FF pin exceeds the threshold ...
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... LLC Skip (Skip Pin, B Version Only) To avoid any frequency runaway in light conditions but also to improve the standby power consumption, the NCP1910B welcomes a skip mode operation (Skip pin) which permanently observes the opto−coupler collector as depicted in Figure 60. If skip pin senses a low voltage, it cuts ...
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... PG out LLC works off Remote on/off (on/off pin) NCP1910 reserves one dedicated pin for remote control feature at on/off pin: • When the on/off pin is pulled below 1 V, the PFC starts operation after V is above 95% of target bulk level, LLC starts. ...
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... Bias the Controller It is recommended to add a typical 100 nF decoupling capacitor next to the V operation. The hysteresis between V CC(on) small because the NCP1910 is supposed to be biased by external power source. Therefore it is recommended to make a low−voltage source to bias NCP1910, e.g. the standby power supply. Thermal Shutdown ...
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... As depicated in the above sections, there are 3 fault modes that latch off both PFC and LLC: • PFC abnormal • PFC OVP2 • LLC CS/FF pin is above V CS2 To release from the latch−off mode, NCP1910 offers 3 ways: ORDERING INFORMATION Device Version NCP1910A65DWR2G 65 kHz − A NCP1910B65DWR2G 65 kHz − B † ...
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... PRESENT, THEN A PIN 1 IDENTIFIER MUST BE LOCATED IN THE INDICATED AREA. MILLIMETERS DIM MIN MAX A 2.35 2.65 A1 0.10 0.29 b 0.31 0.51 J 0.20 0.33 D 15.40 BSC E 10.30 BSC E1 7.50 BSC e 1.27 BSC h 0.25 0.75 L 0.40 1.27 L2 0.25 BSC Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP1910/D ...