s-8204a Seiko Instruments Inc., s-8204a Datasheet - Page 9

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s-8204a

Manufacturer Part Number
s-8204a
Description
Battery Protection Ic For 3-series Or 4-series Cell Pack
Manufacturer
Seiko Instruments Inc.
Datasheet

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Rev.1.3
3.
2. 5 Short circuit Detection Voltage (V
2. 6 Charge Overcurrent Detection Voltage (V
2. 7 CTLC Input Voltage “H” (V
2. 8 CTLD Input Voltage “H” (V
2. 9 SEL Input Voltage “H” (V
3. 1 CCT pin Resistance (R
3. 2 CDT pin Resistance (R
3. 3 CIT pin Resistance 1 (R
3. 4 CIT pin Resistance 2 (R
CCT pin Resistance, CDT pin Resistance, CIT pin Resistance 1, CIT pin Resistance 2, CCT pin
Detection Voltage, CDT pin Detection Voltage, CIT pin Detection Voltage, Short circuit Detection
Voltage Delay Time (Test circuit 3)
The short circuit detection voltage (V
to “H” after increasing the VINI pin’s voltage gradually from the initial state after setting the CIT pin’s
voltage to the V
The charge overcurrent detection voltage (V
is set to “H” after decreasing the VINI pin’s voltage gradually from the initial status.
The CTLC input voltage “H” (V
“H” after increasing the CTLC pin’s voltage gradually from the initial status. After that, decreasing the
CTLC pin’s voltage gradually, the CTLC pin’s voltage when the COP pin’s voltage is set to “L”; is the
CTLC input voltage “L” (V
The CTLD input voltage “H” (V
“H” after increasing the CTLD pin’s voltage gradually from the initial state. After that, decreasing the
CTLD pin’s voltage gradually, the CTLD pin’s voltage when the DOP pin’s voltage is set to “L”; is the
CTLD input voltage “L” (V
Start from the initial status, set V4 = 0 V. Confirm the DOP is in “H”. After that, decreasing the SEL
pin’s voltage gradually, the SEL pin’s voltage when the DOP pin’s voltage is set to “L”; is the SEL input
voltage “L” (V
the DOP pin’s voltage is set to “H”; is the SEL input voltage “H” (V
Confirm both COP and DOP pins are in “L” after setting V
= CDT = CIT = V
The CCT pin resistance (R
when setting V1 = 4.7 V from the initial status.
The CDT pin resistance (R
when setting V1 = 1.5 V from the initial status.
The CIT pin resistance 1 (R
when setting V
The CIT pin resistance 2 (R
when setting V
_00
BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
SELL
VINI
VINI
SS
SS
). After that, increasing the SEL pin’s voltage gradually, the SEL pin’s voltage when
level.
= V
= V
, V1 = V2 = V3 = V4 = 3.5 V. (This status is referred to as initial state.)
DIOV1
DIOV2
CTLCL
CTLDL
CCT
CDT
max. + 0.05 V from the initial status.
max. + 0.05 V from the initial status.
CIT1
CIT2
CCT
CDT
SELH
CIT1
CIT2
)
)
)
)
CTLCH
).
CTLDH
).
) is R
) is R
CTLCH
CTLDH
) is R
) is R
), SEL Input Voltage “L” (V
), CTLC Input Voltage “L” (V
), CTLD Input Voltage “L” (V
Seiko Instruments Inc.
) is the CTLC pin’s voltage; when the COP pin’s voltage is set to
) is the CTLD pin’s voltage; when the DOP pin’s voltage is set to
CCT
CDT
SHORT
CIT1
CIT2
SHORT
= V
= V
= V
= V
) is the VINI pin’s voltage; when the DOP pin’s voltage is set
)
DS
DS
CIOV
DS
DS
CIOV
/ I
/ I
) is the VINI pin’s voltage; when the COP pin’s voltage
/ I
/ I
CCT
CDT
)
CIT1
CIT2
, I
, I
, I
, I
CCT
CDT
CIT1
CIT2
VMP
is the current which flows from the CCT pin
is the current which flows from the CDT pin
is the current which flows from the CIT pin
is the current which flows from the CIT pin
SELL
= V
)
SEL
CTLCL
CTLDL
SELH
= V
).
)
)
DD
, V
VINI
= V
S-8204A Series
CTLC
= V
CTLD
= CCT
9

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