lt3572 Linear Technology Corporation, lt3572 Datasheet - Page 8

• Manufacturer Part Number: lt3572
• Description: Dual Full-bridge Piezo Driver With 900ma Boost Converter
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
LT3572
Duty Cycle
The typical maximum duty cycle of the LT3572 is 95% at
1MHz. This maximum duty cycle reduces as the switch-
ing frequency is increased. The duty cycle for a given
application is given by:
where V
V
can be used at higher duty cycles, but must be operated
in the discontinuous mode so that the actual duty cycle
is reduced.
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistors
according to:
Shutdown Pins
When held below 0.3V, ⎯ S ⎯ H ⎯ D ⎯ N ⎯ A and ⎯ S ⎯ H ⎯ D ⎯ N ⎯ B prevent the
drivers from switching and keep the outputs in a high
impedance state. If ⎯ S ⎯ H ⎯ D ⎯ N is held below 0.3V then the
switching regulator is prevented from turning on. When
any one of these pins are pulled above 1.5V the internal
circuitry is turned on and the respective output is allowed
to operate. When the LT3572 is not in use all three pins
should be pulled low.
Oscillator
The LT3572 can operate at switching frequencies from
500kHz up to 2.25MHz by changing the value of the re-
sistor R3 on the RT pin. Figure 2 shows a graph of RT vs
Switching Frequency.
The oscillator can be synchronized with an external clock
applied to the SYNC pin. When synchronizing the oscilla-
tor, the free running frequency must be set approximately
8
CESAT
DC
R
1
=
=
is, in the worst case, 310mV at 0.8A. The LT3572
R
D
V
2
OUT
is the diode forward drop, typically 0.5V and
V
⎛
⎝ ⎜
OUT
1 225
V
.
+
OUT
+
V
D
V
V
D
–
–
–
V
1
CESAT
⎞
⎠ ⎟
V
IN
15% lower than the desired synchronized frequency. If
the sync function is not used the SYNC pin must be tied
to ground.
⎯ P ⎯ G ⎯ O ⎯ O ⎯ D
The part has a power good feature that detects when the
output boost converter is up and in regulation. When the
part is turned off or not in regulation the ⎯ P ⎯ G ⎯ O ⎯ O ⎯ D pin is
in a high impedance state. When the part is within 95%
of regulation the ⎯ P ⎯ G ⎯ O ⎯ O ⎯ D pin is pulled low signaling that
the output is valid. If the output then falls below 85% of
regulation the ⎯ P ⎯ G ⎯ O ⎯ O ⎯ D pin is put back in a high impedance
state. Whenever the output is not in regulation the output
pins in the driver aren’t allowed to switch and are placed
in a high impedance state. The ⎯ P ⎯ G ⎯ O ⎯ O ⎯ D pin is an open
drain of an NMOS devices with an impedance of 1kΩ and
should be tied to V
Soft-Start
The soft-start feature limits the inrush current drawn from
the supply upon start-up. An internal current source with a
nominal 4.5μA current source charges an external capacitor
C2. The voltage on the soft-start pin is used to control the
output of the error amplifi er, which limits the maximum
peak current through the inductor and the inrush current
drawn from the supply during start-up.
Figure 2. RT Resistance vs Switching Frequency
10000
1000
100
10
IN
through a resistor.
RT RESISTANCE (kΩ)
3572 F02
100
3572f