SY100S351JC TR Micrel Inc, SY100S351JC TR Datasheet

IC FLIP FLOP HEX D 28-PLCC

SY100S351JC TR

Manufacturer Part Number
SY100S351JC TR
Description
IC FLIP FLOP HEX D 28-PLCC
Manufacturer
Micrel Inc
Series
100Sr
Type
D-Type Busr
Datasheet

Specifications of SY100S351JC TR

Function
Master Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
6
Frequency - Clock
700MHz
Delay Time - Propagation
1.2ns
Trigger Type
Positive Edge
Voltage - Supply
4.2 V ~ 5.5 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output High, Low
-
Other names
SY100S351JCTR
SY100S351JCTR
Micrel, Inc.
■ Max. toggle frequency of 700MHz
■ Clock to Q max. of 1200ps
■ I
■ Industry standard 100K ECL levels
■ Extended supply voltage option:
■ Voltage and temperature compensation for improved
■ Internal 75kΩ input pull-down resistors
■ 50% faster than Fairchild 300K
■ Better than 20% lower power than Fairchild
■ Function and pinout compatible with Fairchild F100K
■ Available in 28-pin PLCC package
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
D
CP
MR
Q
Q
V
V
FEATURES
PIN NAMES
V
noise immunity
EE
EES
CCA
0
0
0
EE
a
— D
— Q
— Q
, CP
min. of –98mA
Pin
= –4.2V to –5.5V
5
5
5
b
Data Inputs
Common Clock Inputs
Asynchronous Master Reset Input
Data Outputs
Complementary Data Outputs
V
V
EE
CCO
Substrate
for ECL Outputs
Function
HEX D FLIP-FLOP
1
slave flip-flops with differential outputs, and is designed for
use in high-performance ECL systems. The flip-flops are
controlled by the signal from the logical OR operation on a
pair of common clock signals (CP
master when both CP
slave when either CP
The Master Reset (MR) input overrides all other inputs and
takes the Q outputs to a logic LOW. The inputs on this device
have 75kΩ pull-down resistors.
DESCRIPTION
BLOCK DIAGRAM
The SY100S351 offers six D-type, edge-triggered, master/
a
a
and CP
or CP
b
b
(or both) go to a logic HIGH.
are LOW and transfers to the
a
, CP
b
). Data enters the
Rev.: I
Issue Date: June 2010
SY100S351
SY100S351
Amendment: /0

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SY100S351JC TR Summary of contents

Page 1

Micrel, Inc. FEATURES ■ Max. toggle frequency of 700MHz ■ Clock to Q max. of 1200ps ■ I min. of –98mA EE ■ Industry standard 100K ECL levels ■ Extended supply voltage option –4.2V to –5.5V EE ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75kΩ input pull-down resistors ■ 50% faster than Fairchild 300K ■ Better than 20% lower power than Fairchild ■ Function and pinout compatible with Fairchild F100K ■ Available in 28-pin PLCC package PIN NAMES Pin Function D — D Data ...

Page 2

Micrel, Inc. PACKAGE/ORDERING INFORMATION 28-Pin PLCC (J28-1) TRUTH TABLES Asynchronous Operation Inputs NOTE High Voltage Level L = Low Voltage Level X = Don't Care t = Time ...

Page 3

Micrel, Inc. DC ELECTRICAL CHARACTERISTICS V = –4.2V to –5.5V unless otherwise specified Symbol Parameter I Input HIGH Current – Power Supply Current EE AC ELECTRICAL CHARACTERISTICS V ...

Page 4

Micrel, Inc. TIMING DIAGRAMS NOTE –4.2V to –5.5V unless otherwise specified M9999-060910 hbwhelp@micrel.com or (408) 955-1690 Propagation Delay (Clock) and Transition Times = V = GND CC CCA Propagation Delay (Resets) 4 SY100S351 ...

Page 5

Micrel, Inc. TIMING DIAGRAMS Notes –4.2V to –5.5V unless otherwise specified the minimum time before the transition of the clock that information S must be present at the data input ...

Page 6

Micrel, Inc. 28-PIN PLCC (J28-1) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 tel The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves ...

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