el7571c ETC-unknow, el7571c Datasheet - Page 3

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el7571c

Manufacturer Part Number
el7571c
Description
Programmable Controller
Manufacturer
ETC-unknow
Datasheet

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AC Electrical Characteristics
T
Pin Descriptions
f
f
t
t
T
D
A
OSC
CLK
OTEN
SYNC
Pin No.
Parameter
START
1.
MAX
= 25°C, V
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
Pin designators: I = Input, O = Output, S = Supply
CSLOPE
PWRGD
IN
OTEN
GNDP
Name
COSC
VID0
VID1
VID2
VID3
VID4
VINP
GND
HSD
VH1
REF
LSD
VIN
Pin
LX
FB
CS
= 5V, C
Nominal Oscillator Frequency
Clock Frequency
Shutdown Delay
Oscillator Sync. Pulse Width
Soft-start Period
Maximum Duty Cycle
OSC
Type
Pin
O
O
O
O
= 330pF, C
S
S
S
S
S
S
I
I
I
I
I
I
I
I
I
I
[1]
Description
Chip enable input, internal pull up (5mA typical). Active high.
With a capacitor attached from CSLOPE to GND, generates the voltage ramp compensation for the PWM current mode con-
troller. Slope rate is determined by an internal 14uA pull up and the C
the termination of the high side cycle.
Multi-function pin: with a timing capacitor attached, sets the internal oscillator rate f
low for a duration t
Band gap reference output. Decouple to GND with 0.1uF.
Power good, open drain output. Set low whenever the output voltage is not within ±13% of the programmed value.
Bit 0 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 1 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 2 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 3 of the output voltage select DAC. Internal pull up sets input high when not driven.
Bit 4 of the output voltage select DAC. Internal pull up sets input high when not driven.
Voltage regulation feedback input. Tie to V
Current sense. Current feedback input of PWM controller and over current capacitor input. Current limit threshold set at
+154mV with respect to FB. Connect sense resistor between CS and FB for normal operation.
Ground
Power ground for low side FET driver. Tie to GND for normal operation.
Low side gate drive output.
Input supply voltage for low side FET driver. Tie to VIN for normal operation.
Input supply voltage for control unit.
Negative supply input for high side FET driver.
High side gate drive output. Driver ground referenced to LX. Driver supply may be bootstrapped to enhance low controller
input voltage operation.
Positive supply input for high side FET driver.
SLOPE
= 390pF unless otherwise specified.
SYNC
synchronizes device to an external clock.
C
V
Oscillator i/p (COSC) driven with HCMOS
gate
V
OSC
OTEN
OUT
= 330pF
= 3.5V
>1.5V
3
OUT
Conditions
for normal operation.
Function
Programmable PWM Controller
SLOPE
capacitor value. VC
Min
140
50
20
S
(kHz) = 57/C
100/f
Typ
190
500
100
97
CLK
EL7571C
SLOPE
OSC
Max
1000
is reset to ground at
240
800
(µF); when pulsed
Unit
kHz
kHz
ns
ns
us
%

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