MC100LVEL31DG ON Semiconductor, MC100LVEL31DG Datasheet - Page 4

• Manufacturer Part Number: MC100LVEL31DG
• Description: IC FLIP FLOP ECL 3.3V S/R 8SOIC
• Manufacturer: ON Semiconductor
• Series: 100LVELr
• Type: D-Typer

Specifications of MC100LVEL31DG

• Function: Set(Preset) and Reset
• Output Type: Differential
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Frequency - Clock: 2.9GHz
• Delay Time - Propagation: 475ps
• Trigger Type: Positive Edge
• Voltage - Supply: 3 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Circuits: 1
• Logic Family: 100
• Logic Type: D-Type Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 0.59 ns
• Supply Voltage (max): - 3.8 V, 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): - 3 V or 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: MC100LVEL31DGOS

Table 6. AC CHARACTERISTICS
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
6. V
f
t
t
t
t
t
t
t
t
t
Symbol
max
PLH
PHL
S
H
RR
JITTER
PW
r
f
EE
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
can vary ±0.3 V.
Maximum Toggle Frequency
Propagation Delay
to Output
Setup Time
Hold Time
Set/Reset Recovery
Cycle−to−Cycle Jitter
Minimum Pulse Width
Output Rise/Fall Times Q
(20% − 80%)
Characteristic
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Figure 2. Typical Termination for Output Driver and Device Evaluation
V
CC
Q
Q
Set, Reset
= 3.3 V; V
CLK
S, R
CLK
EE
= 0.0 V or V
Min
365
385
150
250
400
340
600
120
2.7
Z
Z
http://onsemi.com
o
o
= 50 W
= 50 W
−40°C
TBD
Typ
465
475
100
200
220
0
50 W
V
4
CC
TT
= 0.0 V; V
= V
Max
580
620
320
V
CC
TT
− 3.0 V
50 W
EE
Min
375
395
150
250
400
340
600
120
2.9
= −3.3 V (Note 6)
25°C
TBD
Typ
475
485
100
200
220
0
D
D
Max
590
630
320
Receiver
Device
Min
415
435
150
250
400
340
600
120
2.9
85°C
TBD
Typ
530
525
100
200
220
0
Max
630
670
320
GHz
Unit
ps
ps
ps
ps
ps
ps