bd95830muv ROHM Co. Ltd., bd95830muv Datasheet - Page 4

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bd95830muv

Manufacturer Part Number
bd95830muv
Description
2ch Dc/dc Converter Ic
Manufacturer
ROHM Co. Ltd.
Datasheet

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○ NOTE FOR USE
1. Absolute maximum ratings
2. GND pin voltage
3. Thermal design
4. Input supply voltage
5. Inter-pin shorts and mounting errors
6. Actions in strong electromagnetic field
7. ASO
8. Testing on application boards
9. Electrical characteristics
10. Not of a radiation-resistant design.
11. In the event that load containing a large inductance component
12. Regarding input pin of the IC
13. Ground Wiring Pattern
14. Operating ranges
15. Thermal shutdown circuit
16.Output Voltage Resistor Setting
17. Over Output Current Protection
18. Heat sink (FIN)
Since the heat sink (FIN) is connected with the Sub, short it to the GND.
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices,
thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the
absolute maximum ratings, consider adding circuit protection devices, such as fuses.
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the
inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC.
The electrical characteristics in the Specifications may vary depending on ambient temperature, power supply voltage, circuit(s) externally applied,
and/or other conditions. It is therefore requested to carefully check them including transient characteristics.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For
example, the relation between each potential is as follows:
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits,
operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the
GND (P substrate) voltage to an input pin, should not be used.
This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the chip temperature reaches the threshold value listed
below. When TSD is on, the device goes to high impedance mode. Note that the TSD circuit is provided for the exclusive purpose shutting down the
IC in the presence of extreme heat, and is not designed to protect the IC per se or guarantee performance when or after extreme heat conditions
occur. Therefore, do not operate the IC with the expectation of continued use or subsequent operation once the TSD is activated.
Output volage is adjusted with resistor. Total 10kohm resistor is recommended so that the output voltage is not affected by the FB input current (Typ.
1uA).
This IC has an over current protection (4.0A[typ]), with prevents IC from being damage by short circuit at over current. However, It is recommend not
to use that continuously operates the protection circuit (For instance, always the load that greatly exceeds the output current ability is connected or
the output is short-circuited, etc.) in these protection circuits by an effective one to the destruction prevention due to broken accident.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge
GND, PGND1 and PGND2 terminal should be connected the lowest voltage, under all conditions. And all terminals except SW should be under GND
terminal voltage under all conditions including transient situations. If a terminal exists under GND, it should be inserting a bypass route.
If IC is used on condition that the power loss is over the power dissipation, the reliability will become worse by heat up, such as reduced output
current capability. Also, be sure to use this IC within a power dissipation range allowing enough of margin.
Input supply pattern layout should be as short as possible.
Note the direction and the miss-registration of IC enough when you install it in the set substrate. IC might destroy it as well as reversely
connecting the power supply connector when installing it by mistake. Moreover, there is fear of destruction when the foreign body enters
between terminals, the terminal, the power supply, and grandeur and it is short-circuited.
is connected to the output terminal, and generation of back-EMF at the start-up
and when output is turned OFF is assumed, it is requested to insert a protection diode.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point
at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations
in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either.
If it is within the operating ranges, certain circuit functions and operations are warranted in the working ambient temperature range. With respect
to characteristic values, it is unable to warrant standard values of electric characteristics but there are no sudden variations in characteristic values
within these ranges.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
Parasitic element
Pin A
N
P
N
TSD ON temperature [℃] (typ.)
GND
P
P substrate
P
Resistor
N
175
Pin A
Parasitic
element
REV. A
Parasitic element
Pin B
N
P
Hysteresis temperature[℃] (typ.)
C
B
N
E
GND
P
Transistor (NPN)
P substrate
P
N
GND
15
OUTPUT
PIN
Other adjacent elements
Pin B
B
C
E
GND
Parasitic
element
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