sc120skevb Semtech Corporation, sc120skevb Datasheet - Page 24

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sc120skevb

Manufacturer Part Number
sc120skevb
Description
Low Voltage Synchronous Boost Regulator
Manufacturer
Semtech Corporation
Datasheet
Applications Information (continued)
pause at a reduced output voltage until the load is reduced
further.
Output Overload and Recovery
When in PSAVE operation, an increasing load will eventu-
ally satisfy one of the PSAVE exit criteria and regulation
will revert to PWM operation. As previously noted, the
PWM steady state duty cycle is determined by
D = 1 – (V
tice to overcome dissipative losses. As the output load
increases, the dissipative losses also increase. The PWM
controller must increase the duty cycle to compensate.
Eventually, one of two overload conditions will occur,
determined by V
due to the output load current. Either the maximum duty
cycle of 90% will be reached or the n-channel FET 1.2A
(nominal) peak current limit will be reached, which eff ec-
tively limits the duty cycle to a lower value. Above that
load, the output voltage will decrease rapidly and in
reverse order the startup current limits will be invoked as
the output voltage falls through its various voltage thresh-
olds. How far the output voltage drops depends on the
load voltage vs. current characteristic.
A reduction in input voltage, such as a discharging battery,
will lower the load current at which overload occurs.
Lower input voltage increases the duty cycle required to
produce a given output voltage. And lower input voltage
also increases the input current to maintain the input
power, which increases dissipative losses and further
increases the required duty cycle. Therefore an increase in
load current or a decrease in input voltage can result in
output overload.
Once an overload has occurred, the load must be
decreased to permit recovery. The conditions required for
overload recovery are identical to those required for suc-
cessful initial startup.
Anti-ringing Circuitry
In PWM operation, the n-channel and p-channel FETs are
simultaneously turned off when the inductor current
reaches zero. They remain off for the zero-inductor-
current portion of the off -state. Note that discontinuous
mode is a marginal-load condition, which if persistent will
trigger a transition to PSAVE operation.
IN
/V
OUT
), but must be somewhat greater in prac-
IN
, V
OUT
, and the overall dissipative losses
When both FET switches are simultaneously turned off , an
internal switch between the IN and LX pins is closed, pro-
viding a moderate resistance path across the inductor to
dampen the oscillations at the LX pin. This effectively
reduces EMI that can develop from the resonant circuit
formed by the inductor and the drain capacitance at LX.
The anti-ringing circuitry is disabled between PSAVE
bursts.
Component Selection
The SC120 provides optimum performance when a 4.7μH
inductor is used with a 10μF output capacitor. Diff erent
component values can be used to modify PSAVE exit or
entry loads, modify output voltage ripple in PWM mode,
improve transient response, or to reduce component size
or cost.
Inductor Selection
The inductance value primarily aff ects the amplitude of
inductor current ripple (ΔI
increases ΔI
I
aged over a full on/off cycle. I
n-channel FET current limit I
inductance may lower the output overload current thresh-
old. Increasing ΔI
current, I
load current threshold. This is the output load below
which I
and discontinuous mode PWM regulation, which signals
the SC120 controller to switch to PSAVE operation. In the
extreme case of V
can also reduce the PSAVE inductor burst-envelope current
ripple and voltage ripple.
Equate input power to output power, note that input
current equals inductor current, and average over a full
PWM switching cycle to obtain
where η is effi ciency.
L-max
I
L
= I
avg
L-avg
L-min
L-min
+ ΔI
1
= 0, the boundary between continuous mode
L
= I
. This raises the inductor peak current,
V
L
/2, where I
OUT
L-avg
V
IN
IN
L
approaching V
– ΔI
I
also lowers the inductor minimum
OUT
L
/2, thus raising the PSAVE entry
L-avg
LIM(N)
is the inductor current aver-
L
). Reducing inductance
, therefore reducing the
OUT
L-max
, smaller inductance
is subject to the
SC120
24

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